Chip Revision: v3.0
Known Errors
- [MSPI-751] Data Errors Caused by Asynchronous Timing Issues in the MSPI Address Overlap Detection Function When Read/Write Operations Overlap at Specific Frequencies
- [MSPI-749] Load Access Fault During Chip Power-on or Deep-Sleep Wake-up
- [DMA-767] DMA Channel 0 Transaction ID Overlap Causes Permission Management Issue
- [Analog-765] Output Regulators Cannot Generate a Reliable Supply When Peripheral Power Domain Is Off
- [ROM-764] Secure Boot Verification Failure Caused by Incorrect Buffer Address in ROM
- [MSPI-750] PSRAM Unaligned DMA Read Operations May Return Old Data When Accessing Overlapping Addresses
- [APM-560] Unauthorized AHB Access May Block Subsequent PSRAM or Flash Transactions