Inter-IC Sound (I2S)

Overview

I2S (Inter-IC Sound) is a serial, synchronous communication protocol that is usually used for transmitting audio data between two digital audio devices.

ESP32 contains two I2S peripheral(s). These peripherals can be configured to input and output sample data via the I2S driver.

An I2S bus consists of the following lines:

Master clock line (operational)
Bit clock line
Channel select line
Serial data line

Each I2S controller has the following features that can be configured using the I2S driver:

Operation as system master or slave
Capable of acting as transmitter or receiver
DMA controller that allows for streaming sample data without requiring the CPU to copy each data sample

Each controller can operate in half-duplex communication mode. Thus, the two controllers can be combined to establish full-duplex communication.

I2S0 output can be routed directly to the digital-to-analog converter’s (DAC) output channels (GPIO 25 & GPIO 26) to produce direct analog output without involving any external I2S codecs. I2S0 can also be used for transmitting PDM (Pulse-density modulation) signals.

The I2S peripherals also support LCD mode for communicating data over a parallel bus, as used by some LCD displays and camera modules. LCD mode has the following operational modes:

LCD master transmitting mode
Camera slave receiving mode
ADC/DAC mode

For more information, see ESP32 Technical Reference Manual > I2S Controller (I2S) > LCD Mode [PDF].

Note

For high accuracy clock applications, use the APLL_CLK clock source, which has the frequency range of 16 ~ 128 MHz. You can enable the APLL_CLK clock source by setting i2s_config_t::use_apll to TRUE.

If i2s_config_t::use_apll = TRUE and i2s_config_t::fixed_mclk > 0, then the master clock output frequency for I2S will be equal to the value of i2s_config_t::fixed_mclk, which means that the mclk frequency is provided by the user, instead of being calculated by the driver.

The clock rate of the word select line, which is called audio left-right clock rate (LRCK) here, is always the divisor of the master clock output frequency and for which the following is always true: 0 < MCLK/LRCK/channels/bits_per_sample < 64.

Functional Overview

Installing the Driver

Install the I2S driver by calling the function :cpp:func`i2s_driver_install` and passing the following arguments:

Port number
The structure i2s_config_t with defined communication parameters
Event queue size and handle

Once :cpp:func`i2s_driver_install` returns ESP_OK, it means I2S has started.

Configuration example:

static const int i2s_num = 0; // i2s port number

i2s_config_t i2s_config = {
    .mode = I2S_MODE_MASTER | I2S_MODE_TX,
    .sample_rate = 44100,
    .bits_per_sample = I2S_BITS_PER_SAMPLE_16BIT,
    .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
    .communication_format = I2S_COMM_FORMAT_STAND_I2S
    .tx_desc_auto_clear = false,
    .dma_buf_count = 8,
    .dma_buf_len = 64,
    .use_apll = false,
    .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1  // Interrupt level 1, default 0
};

i2s_driver_install(I2S_NUM, &i2s_config, 0, NULL);

Setting Communication Pins

Once the driver is installed, configure physical GPIO pins to which signals will be routed. For this, call the function :cpp:func`i2s_set_pin` and pass the following arguments to it:

Port number
The structure i2s_pin_config_t defining the GPIO pin numbers to which the driver should route the MCK, BCK, WS, DATA out, and DATA in signals. If you want to keep a currently allocated pin number for a specific signal, or if this signal is unused, then pass the macro I2S_PIN_NO_CHANGE. See the example below.

Note

MCK only takes effect in I2S_MODE_MASTER mode.

static const i2s_pin_config_t pin_config = {
    .mck_io_num = 0,
    .bck_io_num = 4,
    .ws_io_num = 5,
    .data_out_num = 18,
    .data_in_num = I2S_PIN_NO_CHANGE
};

i2s_set_pin(i2s_num, &pin_config);

Running I2S Communication

To perform a transmission:

Prepare the data for sending
Call the function i2s_write() and pass the data buffer address and data length to it

The function will write the data to the DMA Tx buffer, and then the data will be transmitted automatically.

i2s_write(I2S_NUM, samples_data, ((bits+8)/16)*SAMPLE_PER_CYCLE*4, &i2s_bytes_write, 100);

To retrieve received data, use the function i2s_read(). It will retrieve the data from the DMA Rx buffer, once the data is received by the I2S controller.

i2s_read(I2S_NUM, data_recv, ((bits+8)/16)*SAMPLE_PER_CYCLE*4, &i2s_bytes_read, 100);

You can temporarily stop the I2S driver by calling the function i2s_stop(), which will disable the I2S Tx/Rx units until the function i2s_start() is called. If the function :cpp:func`i2s_driver_install` is used, the driver will start up automatically eliminating the need to call i2s_start().

Deleting the Driver

If the established communication is no longer required, the driver can be removed to free allocated resources by calling i2s_driver_uninstall().

Application Example

A code example for the I2S driver can be found in the directory peripherals/i2s.

In addition, there are two short configuration examples for the I2S driver.

In addition, there is a short configuration examples for the I2S driver.

I2S configuration

Example for general usage.

#include "driver/i2s.h"

static const int i2s_num = 0; // i2s port number

i2s_config_t i2s_config = {
    .mode = I2S_MODE_MASTER | I2S_MODE_TX,
    .sample_rate = 44100,
    .bits_per_sample = I2S_BITS_PER_SAMPLE_16BIT,
    .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
    .communication_format = I2S_COMM_FORMAT_STAND_I2S
    .tx_desc_auto_clear = false,
    .dma_buf_count = 8,
    .dma_buf_len = 64,
    .use_apll = false,
    .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1  // Interrupt level 1, default 0
};

static const i2s_pin_config_t pin_config = {
    .bck_io_num = 4,
    .ws_io_num = 5,
    .data_out_num = 18,
    .data_in_num = I2S_PIN_NO_CHANGE
};

i2s_driver_install(i2s_num, &i2s_config, 0, NULL);   //install and start i2s driver
i2s_set_pin(i2s_num, &pin_config);

...
/* You can reset parameters by calling 'i2s_set_clk'
 *
 * The low 16 bits are the valid data bits in one chan and the high 16 bits are
 * the total bits in one chan. If high 16 bits is smaller than low 16 bits, it will
 * be set to a same value as low 16 bits.
 */
uint32_t bits_cfg = (I2S_BITS_PER_CHAN_32BIT << 16) | I2S_BITS_PER_SAMPLE_16BIT;
i2s_set_clk(i2s_num, 22050, bits_cfg, I2S_CHANNEL_STEREO);
...

i2s_driver_uninstall(i2s_num); //stop & destroy i2s driver

Configuring I2S to use internal DAC for analog output

#include "driver/i2s.h"
#include "freertos/queue.h"

static const int i2s_num = 0; // i2s port number

static const i2s_config_t i2s_config = {
    .mode = I2S_MODE_MASTER | I2S_MODE_TX | I2S_MODE_DAC_BUILT_IN,
    .sample_rate = 44100,
    .bits_per_sample = 16, /* the DAC module will only take the 8bits from MSB */
    .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
    .intr_alloc_flags = 0, // default interrupt priority
    .dma_buf_count = 8,
    .dma_buf_len = 64,
    .use_apll = false
};

...

    i2s_driver_install(i2s_num, &i2s_config, 0, NULL);   //install and start i2s driver

    i2s_set_pin(i2s_num, NULL); //for internal DAC, this will enable both of the internal channels

    //You can call i2s_set_dac_mode to set built-in DAC output mode.
    //i2s_set_dac_mode(I2S_DAC_CHANNEL_BOTH_EN);

    i2s_set_sample_rates(i2s_num, 22050); //set sample rates

    i2s_driver_uninstall(i2s_num); //stop & destroy i2s driver

API Reference

Header File

components/driver/include/driver/i2s.h

Functions

esp_err_t i2s_set_pin(i2s_port_t i2s_num, const i2s_pin_config_t *pin)

Set I2S pin number.

Inside the pin configuration structure, set I2S_PIN_NO_CHANGE for any pin where the current configuration should not be changed.

Note

The I2S peripheral output signals can be connected to multiple GPIO pads. However, the I2S peripheral input signal can only be connected to one GPIO pad.

Note

if *pin is set as NULL, this function will initialize both of the built-in DAC channels by default. if you don’t want this to happen and you want to initialize only one of the DAC channels, you can call i2s_set_dac_mode instead.

Parameters

i2s_num – I2S port number
pin – I2S Pin structure, or NULL to set 2-channel 8-bit internal DAC pin configuration (GPIO25 & GPIO26)

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error
ESP_FAIL IO error

esp_err_t i2s_set_pdm_rx_down_sample(i2s_port_t i2s_num, i2s_pdm_dsr_t downsample)

Set PDM mode down-sample rate In PDM RX mode, there would be 2 rounds of downsample process in hardware. In the first downsample process, the sampling number can be 16 or 8. In the second downsample process, the sampling number is fixed as 8. So the clock frequency in PDM RX mode would be (fpcm * 64) or (fpcm * 128) accordingly.

Note

After calling this function, it would call i2s_set_clk inside to update the clock frequency. Please call this function after I2S driver has been initialized.

Parameters

i2s_num – I2S port number
downsample – i2s RX down sample rate for PDM mode.

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error
ESP_ERR_NO_MEM Out of memory

esp_err_t i2s_set_pdm_tx_up_sample(i2s_port_t i2s_num, const i2s_pdm_tx_upsample_cfg_t *upsample_cfg)

Set TX PDM mode up-sample rate.

Note

If you have set PDM mode while calling ‘i2s_driver_install’, default PDM TX upsample parameters have already been set, no need to call this function again if you don’t have to change the default configuration

Parameters

i2s_num – I2S port number
upsample_cfg – Set I2S PDM up-sample rate configuration

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error
ESP_ERR_NO_MEM Out of memory

esp_err_t i2s_driver_install(i2s_port_t i2s_num, const i2s_config_t *i2s_config, int queue_size, void *i2s_queue)

Install and start I2S driver.

This function must be called before any I2S driver read/write operations.

Parameters

i2s_num – I2S port number
i2s_config – I2S configurations - see i2s_config_t struct
queue_size – I2S event queue size/depth.
i2s_queue – I2S event queue handle, if set NULL, driver will not use an event queue.

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error
ESP_ERR_NO_MEM Out of memory
ESP_ERR_INVALID_STATE Current I2S port is in use

esp_err_t i2s_driver_uninstall(i2s_port_t i2s_num)

Uninstall I2S driver.

Parameters

i2s_num – I2S port number

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error
ESP_ERR_INVALID_STATE I2S port has been uninstalled by others (e.g. LCD i80)

esp_err_t i2s_write(i2s_port_t i2s_num, const void *src, size_t size, size_t *bytes_written, TickType_t ticks_to_wait)

Write data to I2S DMA transmit buffer.

Parameters

i2s_num – I2S port number
src – Source address to write from
size – Size of data in bytes
bytes_written – [out] Number of bytes written, if timeout, the result will be less than the size passed in.
ticks_to_wait – TX buffer wait timeout in RTOS ticks. If this many ticks pass without space becoming available in the DMA transmit buffer, then the function will return (note that if the data is written to the DMA buffer in pieces, the overall operation may still take longer than this timeout.) Pass portMAX_DELAY for no timeout.

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t i2s_write_expand(i2s_port_t i2s_num, const void *src, size_t size, size_t src_bits, size_t aim_bits, size_t *bytes_written, TickType_t ticks_to_wait)

Write data to I2S DMA transmit buffer while expanding the number of bits per sample. For example, expanding 16-bit PCM to 32-bit PCM.

Format of the data in source buffer is determined by the I2S configuration (see i2s_config_t).

Parameters

i2s_num – I2S port number
src – Source address to write from
size – Size of data in bytes
src_bits – Source audio bit
aim_bits – Bit wanted, no more than 32, and must be greater than src_bits
bytes_written – [out] Number of bytes written, if timeout, the result will be less than the size passed in.
ticks_to_wait – TX buffer wait timeout in RTOS ticks. If this many ticks pass without space becoming available in the DMA transmit buffer, then the function will return (note that if the data is written to the DMA buffer in pieces, the overall operation may still take longer than this timeout.) Pass portMAX_DELAY for no timeout.

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t i2s_read(i2s_port_t i2s_num, void *dest, size_t size, size_t *bytes_read, TickType_t ticks_to_wait)

Read data from I2S DMA receive buffer.

Note

If the built-in ADC mode is enabled, we should call i2s_adc_enable and i2s_adc_disable around the whole reading process, to prevent the data getting corrupted.

Parameters

i2s_num – I2S port number
dest – Destination address to read into
size – Size of data in bytes
bytes_read – [out] Number of bytes read, if timeout, bytes read will be less than the size passed in.
ticks_to_wait – RX buffer wait timeout in RTOS ticks. If this many ticks pass without bytes becoming available in the DMA receive buffer, then the function will return (note that if data is read from the DMA buffer in pieces, the overall operation may still take longer than this timeout.) Pass portMAX_DELAY for no timeout.

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t i2s_set_sample_rates(i2s_port_t i2s_num, uint32_t rate)

Set sample rate used for I2S RX and TX.

The bit clock rate is determined by the sample rate and i2s_config_t configuration parameters (number of channels, bits_per_sample).

bit_clock = rate * (number of channels) * bits_per_sample

Parameters

i2s_num – I2S port number
rate – I2S sample rate (ex: 8000, 44100…)

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error
ESP_ERR_NO_MEM Out of memory

esp_err_t i2s_stop(i2s_port_t i2s_num)

Stop I2S driver.

There is no need to call i2s_stop() before calling i2s_driver_uninstall().

Disables I2S TX/RX, until i2s_start() is called.

Parameters

i2s_num – I2S port number

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t i2s_start(i2s_port_t i2s_num)

Start I2S driver.

It is not necessary to call this function after i2s_driver_install() (it is started automatically), however it is necessary to call it after i2s_stop().

Parameters

i2s_num – I2S port number

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t i2s_zero_dma_buffer(i2s_port_t i2s_num)

Zero the contents of the TX DMA buffer.

Pushes zero-byte samples into the TX DMA buffer, until it is full.

Parameters

i2s_num – I2S port number

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t i2s_set_clk(i2s_port_t i2s_num, uint32_t rate, uint32_t bits_cfg, i2s_channel_t ch)

Set clock & bit width used for I2S RX and TX.

Similar to i2s_set_sample_rates(), but also sets bit width.

stop i2s;
calculate mclk, bck, bck_factor
malloc dma buffer;
start i2s

Parameters

i2s_num – I2S port number
rate – I2S sample rate (ex: 8000, 44100…)
bits_cfg – I2S bits configuration the low 16 bits is for data bits per sample in one channel (see ‘i2s_bits_per_sample_t’) the high 16 bits is for total bits in one channel (see ‘i2s_bits_per_chan_t’) high 16bits =0 means same as the bits per sample.
ch – I2S channel, (I2S_CHANNEL_MONO, I2S_CHANNEL_STEREO or specific channel in TDM mode)

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error
ESP_ERR_NO_MEM Out of memory

float i2s_get_clk(i2s_port_t i2s_num)

get clock set on particular port number.

Parameters

i2s_num – I2S port number

Returns

actual clock set by i2s driver

esp_err_t i2s_set_adc_mode(adc_unit_t adc_unit, adc1_channel_t adc_channel)

Set built-in ADC mode for I2S DMA, this function will initialize ADC pad, and set ADC parameters.

Note

In this mode, the ADC maximum sampling rate is 150KHz. Set the sampling rate through i2s_config_t.

Parameters

adc_unit – SAR ADC unit index
adc_channel – ADC channel index

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t i2s_adc_enable(i2s_port_t i2s_num)

Start to use I2S built-in ADC mode.

Note

This function would acquire the lock of ADC to prevent the data getting corrupted during the I2S peripheral is being used to do fully continuous ADC sampling.

Parameters

i2s_num – i2s port index

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error
ESP_ERR_INVALID_STATE Driver state error

esp_err_t i2s_adc_disable(i2s_port_t i2s_num)

Stop to use I2S built-in ADC mode.

Note

This function would release the lock of ADC so that other tasks can use ADC.

Parameters

i2s_num – i2s port index

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error
ESP_ERR_INVALID_STATE Driver state error

esp_err_t i2s_set_dac_mode(i2s_dac_mode_t dac_mode)

Set I2S dac mode, I2S built-in DAC is disabled by default.

Note

Built-in DAC functions are only supported on I2S0 for current ESP32 chip. If either of the built-in DAC channel are enabled, the other one can not be used as RTC DAC function at the same time.

Parameters

dac_mode – DAC mode configurations - see i2s_dac_mode_t

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

Structures

struct i2s_pdm_tx_upsample_cfg_t

I2S PDM up-sample rate configuration.

Note

TX PDM can only be set to the following two upsampling rate configurations: 1: fp = 960, fs = sample_rate / 100, in this case, Fpdm = 128*48000 2: fp = 960, fs = 480, in this case, Fpdm = 128*Fpcm = 128*sample_rate If the pdm receiver do not care the pdm serial clock, it’s recommended set Fpdm = 128*48000. Otherwise, the second configuration should be applied.

Public Members

int sample_rate: I2S PDM sample rate

int fp: I2S PDM TX upsampling paramater. Normally it should be set to 960

int fs: I2S PDM TX upsampling paramater. When it is set to 480, the pdm clock frequency Fpdm = 128 * sample_rate, when it is set to sample_rate / 100， Fpdm will be fixed to 128*48000

struct i2s_pin_config_t

I2S pin number for i2s_set_pin.

Public Members

int mck_io_num: MCK in out pin. Note that ESP32 supports setting MCK on GPIO0/GPIO1/GPIO3 only

int bck_io_num: BCK in out pin

int ws_io_num: WS in out pin

int data_out_num: DATA out pin

int data_in_num: DATA in pin

struct i2s_driver_config_t

I2S driver configuration parameters.

Public Members

i2s_mode_t mode: I2S work mode

uint32_t sample_rate: I2S sample rate

i2s_bits_per_sample_t bits_per_sample: I2S sample bits in one channel

i2s_channel_fmt_t channel_format: I2S channel format.

i2s_comm_format_t communication_format: I2S communication format

int intr_alloc_flags: Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info

int dma_buf_count: The total number of DMA buffers to receive/transmit data. A descriptor includes some information such as buffer address, the address of the next descriptor, and the buffer length. Since one descriptor points to one buffer, therefore, ‘dma_desc_num’ can be interpreted as the total number of DMA buffers used to store data from DMA interrupt. Notice that these buffers are internal to’i2s_read’ and descriptors are created automatically inside of the I2S driver. Users only need to set the buffer number while the length is derived from the parameter described below.

int dma_buf_len: Number of frames in a DMA buffer. A frame means the data of all channels in a WS cycle. The real_dma_buf_size = dma_buf_len * chan_num * bits_per_chan / 8. For example, if two channels in stereo mode (i.e., ‘channel_format’ is set to ‘I2S_CHANNEL_FMT_RIGHT_LEFT’) are active, and each channel transfers 32 bits (i.e., ‘bits_per_sample’ is set to ‘I2S_BITS_PER_CHAN_32BIT’), then the total number of bytes of a frame is ‘channel_format’ * ‘bits_per_sample’ = 2 * 32 / 8 = 8 bytes. We assume that the current ‘dma_buf_len’ is 100, then the real length of the DMA buffer is 8 * 100 = 800 bytes. Note that the length of an internal real DMA buffer shouldn’t be greater than 4092.

bool use_apll: I2S using APLL as main I2S clock, enable it to get accurate clock

bool tx_desc_auto_clear: I2S auto clear tx descriptor if there is underflow condition (helps in avoiding noise in case of data unavailability)

int fixed_mclk: I2S using fixed MCLK output. If use_apll = true and fixed_mclk > 0, then the clock output for i2s is fixed and equal to the fixed_mclk value. If fixed_mclk set, mclk_multiple won’t take effect

i2s_mclk_multiple_t mclk_multiple: The multiple of I2S master clock(MCLK) to sample rate

i2s_bits_per_chan_t bits_per_chan: I2S total bits in one channel， only take effect when larger than ‘bits_per_sample’, default ‘0’ means equal to ‘bits_per_sample’

struct i2s_event_t

Event structure used in I2S event queue.

Public Members

i2s_event_type_t type: I2S event type

size_t size: I2S data size for I2S_DATA event

Macros

I2S_PIN_NO_CHANGE: Use in i2s_pin_config_t for pins which should not be changed

I2S_PDM_DEFAULT_UPSAMPLE_CONFIG(rate): Default I2S PDM Up-Sampling Rate configuration.

Type Definitions

typedef i2s_driver_config_t i2s_config_t

typedef intr_handle_t i2s_isr_handle_t

Enumerations

enum i2s_port_t

I2S port number, the max port number is (I2S_NUM_MAX -1).

Values:

enumerator I2S_NUM_0: I2S port 0

enumerator I2S_NUM_1: I2S port 1

enumerator I2S_NUM_MAX: I2S port max

enum i2s_event_type_t

I2S event queue types.

Values:

enumerator I2S_EVENT_DMA_ERROR

enumerator I2S_EVENT_TX_DONE: I2S DMA finish sent 1 buffer

enumerator I2S_EVENT_RX_DONE: I2S DMA finish received 1 buffer

enumerator I2S_EVENT_TX_Q_OVF: I2S DMA sent queue overflow

enumerator I2S_EVENT_RX_Q_OVF: I2S DMA receive queue overflow

enumerator I2S_EVENT_MAX: I2S event max index

Header File

components/hal/include/hal/i2s_types.h

Enumerations

enum i2s_bits_per_sample_t

I2S bit width per sample.

Values:

enumerator I2S_BITS_PER_SAMPLE_8BIT: data bit-width: 8

enumerator I2S_BITS_PER_SAMPLE_16BIT: data bit-width: 16

enumerator I2S_BITS_PER_SAMPLE_24BIT: data bit-width: 24

enumerator I2S_BITS_PER_SAMPLE_32BIT: data bit-width: 32

enum i2s_bits_per_chan_t

I2S bit width per chan.

Values:

enumerator I2S_BITS_PER_CHAN_DEFAULT: channel bit-width equals to data bit-width

enumerator I2S_BITS_PER_CHAN_8BIT: channel bit-width: 8

enumerator I2S_BITS_PER_CHAN_16BIT: channel bit-width: 16

enumerator I2S_BITS_PER_CHAN_24BIT: channel bit-width: 24

enumerator I2S_BITS_PER_CHAN_32BIT: channel bit-width: 32

enum i2s_channel_t

I2S channel.

Values:

enumerator I2S_CHANNEL_MONO: I2S channel (mono), one channel activated. In this mode, you only need to send one channel data but the fifo will copy same data for the other unactivated channels automatically, then both channels will transmit same data.

enumerator I2S_CHANNEL_STEREO: I2S channel (stereo), two (or more) channels activated. In this mode, these channels will transmit different data.

enum i2s_comm_format_t

I2S communication standard format.

Values:

enumerator I2S_COMM_FORMAT_STAND_I2S: I2S communication I2S Philips standard, data launch at second BCK

enumerator I2S_COMM_FORMAT_STAND_MSB: I2S communication MSB alignment standard, data launch at first BCK

enumerator I2S_COMM_FORMAT_STAND_PCM_SHORT: PCM Short standard, also known as DSP mode. The period of synchronization signal (WS) is 1 bck cycle.

enumerator I2S_COMM_FORMAT_STAND_PCM_LONG: PCM Long standard. The period of synchronization signal (WS) is channel_bit*bck cycles.

enumerator I2S_COMM_FORMAT_STAND_MAX: standard max

enumerator I2S_COMM_FORMAT_I2S: I2S communication format I2S, correspond to I2S_COMM_FORMAT_STAND_I2S

enumerator I2S_COMM_FORMAT_I2S_MSB: I2S format MSB, (I2S_COMM_FORMAT_I2S |I2S_COMM_FORMAT_I2S_MSB) correspond to I2S_COMM_FORMAT_STAND_I2S

enumerator I2S_COMM_FORMAT_I2S_LSB: I2S format LSB, (I2S_COMM_FORMAT_I2S |I2S_COMM_FORMAT_I2S_LSB) correspond to I2S_COMM_FORMAT_STAND_MSB

enumerator I2S_COMM_FORMAT_PCM: I2S communication format PCM, correspond to I2S_COMM_FORMAT_STAND_PCM_SHORT

enumerator I2S_COMM_FORMAT_PCM_SHORT: PCM Short, (I2S_COMM_FORMAT_PCM | I2S_COMM_FORMAT_PCM_SHORT) correspond to I2S_COMM_FORMAT_STAND_PCM_SHORT

enumerator I2S_COMM_FORMAT_PCM_LONG: PCM Long, (I2S_COMM_FORMAT_PCM | I2S_COMM_FORMAT_PCM_LONG) correspond to I2S_COMM_FORMAT_STAND_PCM_LONG

enum i2s_channel_fmt_t

I2S channel format type.

Values:

enumerator I2S_CHANNEL_FMT_RIGHT_LEFT: Separated left and right channel

enumerator I2S_CHANNEL_FMT_ALL_RIGHT: Load right channel data in both two channels

enumerator I2S_CHANNEL_FMT_ALL_LEFT: Load left channel data in both two channels

enumerator I2S_CHANNEL_FMT_ONLY_RIGHT: Only load data in right channel (mono mode)

enumerator I2S_CHANNEL_FMT_ONLY_LEFT: Only load data in left channel (mono mode)

enum i2s_mode_t

I2S Mode.

Values:

enumerator I2S_MODE_MASTER: Master mode

enumerator I2S_MODE_SLAVE: Slave mode

enumerator I2S_MODE_TX: TX mode

enumerator I2S_MODE_RX: RX mode

enumerator I2S_MODE_DAC_BUILT_IN: Output I2S data to built-in DAC, no matter the data format is 16bit or 32 bit, the DAC module will only take the 8bits from MSB

enumerator I2S_MODE_ADC_BUILT_IN: Input I2S data from built-in ADC, each data can be 12-bit width at most

enumerator I2S_MODE_PDM: I2S PDM mode

enum i2s_clock_src_t

I2S source clock.

Values:

enumerator I2S_CLK_D2CLK: Clock from PLL_D2_CLK(160M)

enumerator I2S_CLK_APLL: Clock from APLL

enum i2s_mclk_multiple_t

The multiple of mclk to sample rate.

Values:

enumerator I2S_MCLK_MULTIPLE_DEFAULT: Default value. mclk = sample_rate * 256

enumerator I2S_MCLK_MULTIPLE_128: mclk = sample_rate * 128

enumerator I2S_MCLK_MULTIPLE_256: mclk = sample_rate * 256

enumerator I2S_MCLK_MULTIPLE_384: mclk = sample_rate * 384

enum i2s_dac_mode_t

I2S DAC mode for i2s_set_dac_mode.

Note

Built-in DAC functions are only supported on I2S0 for current ESP32 chip.

Values:

enumerator I2S_DAC_CHANNEL_DISABLE: Disable I2S built-in DAC signals

enumerator I2S_DAC_CHANNEL_RIGHT_EN: Enable I2S built-in DAC right channel, maps to DAC channel 1 on GPIO25

enumerator I2S_DAC_CHANNEL_LEFT_EN: Enable I2S built-in DAC left channel, maps to DAC channel 2 on GPIO26

enumerator I2S_DAC_CHANNEL_BOTH_EN: Enable both of the I2S built-in DAC channels.

enumerator I2S_DAC_CHANNEL_MAX: I2S built-in DAC mode max index

enum i2s_pdm_dsr_t

I2S PDM RX downsample mode.

Values:

enumerator I2S_PDM_DSR_8S: downsampling number is 8 for PDM RX mode

enumerator I2S_PDM_DSR_16S: downsampling number is 16 for PDM RX mode

enumerator I2S_PDM_DSR_MAX

enum i2s_pdm_sig_scale_t

Values:

enumerator I2S_PDM_SIG_SCALING_DIV_2: I2S TX PDM sigmadelta signal scaling: /2

enumerator I2S_PDM_SIG_SCALING_MUL_1: I2S TX PDM sigmadelta signal scaling: x1

enumerator I2S_PDM_SIG_SCALING_MUL_2: I2S TX PDM sigmadelta signal scaling: x2

enumerator I2S_PDM_SIG_SCALING_MUL_4: I2S TX PDM sigmadelta signal scaling: x4

Provide feedback about this document