GPIO & RTC GPIO

GPIO Summary

The ESP32-H2 chip features 28 physical GPIO pins (GPIO0 ~ GPIO27). Each pin can be used as a general-purpose I/O, or to be connected to an internal peripheral signal. Through GPIO matrix and IO MUX, peripheral input signals can be from any IO pins, and peripheral output signals can be routed to any IO pins. Together these modules provide highly configurable I/O. For more details, see ESP32-H2 Technical Reference Manual > IO MUX and GPIO Matrix (GPIO, IO_MUX) [PDF].

The table below provides more information on pin usage, and please note the comments in the table for GPIOs with restrictions.

GPIO	Analog Function	Comments
GPIO0
GPIO1	ADC1_CH0
GPIO2	ADC1_CH1	Strapping pin
GPIO3	ADC1_CH2	Strapping pin
GPIO4	ADC1_CH3
GPIO5	ADC1_CH4
GPIO6
GPIO7
GPIO8		Strapping pin
GPIO9		Strapping pin
GPIO10	Analog comparator reference voltage
GPIO11	Analog comparator input (non-inverting)
GPIO12
GPIO13
GPIO14
GPIO15		SPI0/1
GPIO16		SPI0/1
GPIO17		SPI0/1
GPIO18		SPI0/1
GPIO19		SPI0/1
GPIO20		SPI0/1
GPIO21		SPI0/1
GPIO22
GPIO23
GPIO24
GPIO25		Strapping pin
GPIO26		USB-JTAG
GPIO27		USB-JTAG

Note

Strapping pin: GPIO2, GPIO3, GPIO8, GPIO9, and GPIO25 are strapping pins. For more infomation, please refer to ESP32H2 datasheet.
- SPI0/1: GPIO15-21 are usually used for SPI flash and not recommended for other uses.
- USB-Serial-JTAG: GPIO 26 and 27 are used by USB-Serial-JTAG by default. In order to use them as GPIOs, USB-Serial-JTAG will be disabled by the drivers.
For chip variants with an SiP flash built in, GPIO15 ~ GPIO21 are dedicated to connecting the SiP flash and are not fan-out to the external pins. In addition, GPIO6 ~ GPIO7 are also not fan-out to the external pins. In conclusion, only GPIO0~ GPIO5, GPIO8~ GPIO14, GPIO22~ GPIO27 are available to users.

GPIO driver offers a dump function gpio_dump_io_configuration() to show the configurations of the IOs at the moment, such as pull-up / pull-down, input / output enable, pin mapping etc. Below is an example dump:

================IO DUMP Start================
IO[4] -
  Pullup: 1, Pulldown: 0, DriveCap: 2
  InputEn: 1, OutputEn: 0, OpenDrain: 0
  FuncSel: 1 (GPIO)
  GPIO Matrix SigIn ID: (simple GPIO input)
  SleepSelEn: 1

IO[18] -
  Pullup: 0, Pulldown: 0, DriveCap: 2
  InputEn: 0, OutputEn: 1, OpenDrain: 0
  FuncSel: 1 (GPIO)
  GPIO Matrix SigOut ID: 256 (simple GPIO output)
  SleepSelEn: 1

IO[26] **RESERVED** -
  Pullup: 1, Pulldown: 0, DriveCap: 2
  InputEn: 1, OutputEn: 0, OpenDrain: 0
  FuncSel: 0 (IOMUX)
  SleepSelEn: 1

=================IO DUMP End==================

If an IO pin is routed to a peripheral signal through the GPIO matrix, the signal ID printed in the dump information is defined in the soc/gpio_sig_map.h file. The word **RESERVED** indicates the IO is occupied by either FLASH or PSRAM. It is strongly not recommended to reconfigure them for other application purposes.

GPIO Glitch Filter

The ESP32-H2 chip features hardware filters to remove unwanted glitch pulses from the input GPIO, which can help reduce false triggering of the interrupt and prevent a noise being routed to the peripheral side.

Each GPIO can be configured with a glitch filter, which can be used to filter out pulses shorter than two sample clock cycles. The duration of the filter is not configurable. The sample clock is the clock source of the IO_MUX. In the driver, we call this kind of filter as pin glitch filter. You can create the filter handle by calling gpio_new_pin_glitch_filter(). All the configurations for a pin glitch filter are listed in the gpio_pin_glitch_filter_config_t structure.

gpio_pin_glitch_filter_config_t::gpio_num sets the GPIO number to enable the glitch filter.

ESP32-H2 provides 8 flexible glitch filters, whose duration is configurable. We refer to this kind of filter as flex flitch filter. Each of them can be applied to any input GPIO. However, applying multiple filters to the same GPIO doesn't make difference from one. You can create the filter handle by calling gpio_new_flex_glitch_filter(). All the configurations for a flexible glitch filter are listed in the gpio_flex_glitch_filter_config_t structure.

gpio_flex_glitch_filter_config_t::gpio_num sets the GPIO that will be applied to the flex glitch filter.

gpio_flex_glitch_filter_config_t::window_width_ns and gpio_flex_glitch_filter_config_t::window_thres_ns are the key parameters of the glitch filter. During gpio_flex_glitch_filter_config_t::window_width_ns, any pulse whose width is shorter than gpio_flex_glitch_filter_config_t::window_thres_ns will be discarded. Please note that, you can't set gpio_flex_glitch_filter_config_t::window_thres_ns bigger than gpio_flex_glitch_filter_config_t::window_width_ns.

Please note, the pin glitch filter and flex glitch filter are independent. You can enable both of them for the same GPIO.

The glitch filter is disabled by default, and can be enabled by calling gpio_glitch_filter_enable(). To recycle the filter, you can call gpio_del_glitch_filter(). Please note, before deleting the filter, you should disable it first by calling gpio_glitch_filter_disable().

GPIO Hysteresis Filter

ESP32-H2 support the hardware hysteresis of the input pin, which can reduce the GPIO interrupt shoot by accident due to unstable sampling when the input voltage is near the critical of logic 0 and 1, especially when the input logic level conversion is slow or the voltage setup time is too long.

Each pin can enable hysteresis function independently. By default, it controlled by eFuse and been closed, but it can also be enabled or disabled by software manually. You can select the hysteresis control mode by configuring gpio_config_t::hys_ctrl_mode.

Note

When the hysteresis function is controlled by eFuse, this feature can still be controlled independently for each pin, you need to burn the eFuse to enable the hysteresis function on specific GPIO additionally.

Application Example

GPIO output and input interrupt example: peripherals/gpio/generic_gpio.

API Reference - Normal GPIO

Header File

components/driver/gpio/include/driver/gpio.h

Functions

esp_err_t gpio_config(const gpio_config_t *pGPIOConfig)

GPIO common configuration.

   Configure GPIO's Mode,pull-up,PullDown,IntrType

Parameters

pGPIOConfig -- Pointer to GPIO configure struct

Returns

ESP_OK success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t gpio_reset_pin(gpio_num_t gpio_num)

Reset an gpio to default state (select gpio function, enable pullup and disable input and output).

Note

This function also configures the IOMUX for this pin to the GPIO function, and disconnects any other peripheral output configured via GPIO Matrix.

Parameters: gpio_num -- GPIO number.
Returns: Always return ESP_OK.

esp_err_t gpio_set_intr_type(gpio_num_t gpio_num, gpio_int_type_t intr_type)

GPIO set interrupt trigger type.

Parameters

gpio_num -- GPIO number. If you want to set the trigger type of e.g. of GPIO16, gpio_num should be GPIO_NUM_16 (16);
intr_type -- Interrupt type, select from gpio_int_type_t

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t gpio_intr_enable(gpio_num_t gpio_num)

Enable GPIO module interrupt signal.

Note

ESP32: Please do not use the interrupt of GPIO36 and GPIO39 when using ADC or Wi-Fi and Bluetooth with sleep mode enabled. Please refer to the comments of adc1_get_raw. Please refer to Section 3.11 of ESP32 ECO and Workarounds for Bugs for the description of this issue.

Parameters

gpio_num -- GPIO number. If you want to enable an interrupt on e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t gpio_intr_disable(gpio_num_t gpio_num)

Disable GPIO module interrupt signal.

Note

This function is allowed to be executed when Cache is disabled within ISR context, by enabling CONFIG_GPIO_CTRL_FUNC_IN_IRAM

Parameters

gpio_num -- GPIO number. If you want to disable the interrupt of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);

Returns

ESP_OK success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t gpio_set_level(gpio_num_t gpio_num, uint32_t level)

GPIO set output level.

Note

This function is allowed to be executed when Cache is disabled within ISR context, by enabling CONFIG_GPIO_CTRL_FUNC_IN_IRAM

Parameters

gpio_num -- GPIO number. If you want to set the output level of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
level -- Output level. 0: low ; 1: high

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG GPIO number error

int gpio_get_level(gpio_num_t gpio_num)

GPIO get input level.

Warning

If the pad is not configured for input (or input and output) the returned value is always 0.

Parameters

gpio_num -- GPIO number. If you want to get the logic level of e.g. pin GPIO16, gpio_num should be GPIO_NUM_16 (16);

Returns

0 the GPIO input level is 0
1 the GPIO input level is 1

esp_err_t gpio_set_direction(gpio_num_t gpio_num, gpio_mode_t mode)

GPIO set direction.

Configure GPIO direction,such as output_only,input_only,output_and_input

Parameters

gpio_num -- Configure GPIO pins number, it should be GPIO number. If you want to set direction of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
mode -- GPIO direction

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG GPIO error

esp_err_t gpio_set_pull_mode(gpio_num_t gpio_num, gpio_pull_mode_t pull)

Configure GPIO pull-up/pull-down resistors.

Note

ESP32: Only pins that support both input & output have integrated pull-up and pull-down resistors. Input-only GPIOs 34-39 do not.

Parameters

gpio_num -- GPIO number. If you want to set pull up or down mode for e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
pull -- GPIO pull up/down mode.

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG : Parameter error

esp_err_t gpio_wakeup_enable(gpio_num_t gpio_num, gpio_int_type_t intr_type)

Enable GPIO wake-up function.

Parameters

gpio_num -- GPIO number.
intr_type -- GPIO wake-up type. Only GPIO_INTR_LOW_LEVEL or GPIO_INTR_HIGH_LEVEL can be used.

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t gpio_wakeup_disable(gpio_num_t gpio_num)

Disable GPIO wake-up function.

Parameters

gpio_num -- GPIO number

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t gpio_isr_register(void (*fn)(void*), void *arg, int intr_alloc_flags, gpio_isr_handle_t *handle)

Register GPIO interrupt handler, the handler is an ISR. The handler will be attached to the same CPU core that this function is running on.

This ISR function is called whenever any GPIO interrupt occurs. See the alternative gpio_install_isr_service() and gpio_isr_handler_add() API in order to have the driver support per-GPIO ISRs.

To disable or remove the ISR, pass the returned handle to the interrupt allocation functions.

Parameters

fn -- Interrupt handler function.
arg -- Parameter for handler function
intr_alloc_flags -- Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.
handle -- Pointer to return handle. If non-NULL, a handle for the interrupt will be returned here.

Returns

ESP_OK Success ;
ESP_ERR_INVALID_ARG GPIO error
ESP_ERR_NOT_FOUND No free interrupt found with the specified flags

esp_err_t gpio_pullup_en(gpio_num_t gpio_num)

Enable pull-up on GPIO.

Parameters

gpio_num -- GPIO number

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t gpio_pullup_dis(gpio_num_t gpio_num)

Disable pull-up on GPIO.

Parameters

gpio_num -- GPIO number

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t gpio_pulldown_en(gpio_num_t gpio_num)

Enable pull-down on GPIO.

Parameters

gpio_num -- GPIO number

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t gpio_pulldown_dis(gpio_num_t gpio_num)

Disable pull-down on GPIO.

Parameters

gpio_num -- GPIO number

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t gpio_install_isr_service(int intr_alloc_flags)

Install the GPIO driver's ETS_GPIO_INTR_SOURCE ISR handler service, which allows per-pin GPIO interrupt handlers.

This function is incompatible with gpio_isr_register() - if that function is used, a single global ISR is registered for all GPIO interrupts. If this function is used, the ISR service provides a global GPIO ISR and individual pin handlers are registered via the gpio_isr_handler_add() function.

Parameters

intr_alloc_flags -- Flags used to allocate the interrupt. One or multiple (ORred) ESP_INTR_FLAG_* values. See esp_intr_alloc.h for more info.

Returns

ESP_OK Success
ESP_ERR_NO_MEM No memory to install this service
ESP_ERR_INVALID_STATE ISR service already installed.
ESP_ERR_NOT_FOUND No free interrupt found with the specified flags
ESP_ERR_INVALID_ARG GPIO error

void gpio_uninstall_isr_service(void): Uninstall the driver's GPIO ISR service, freeing related resources.

esp_err_t gpio_isr_handler_add(gpio_num_t gpio_num, gpio_isr_t isr_handler, void *args)

Add ISR handler for the corresponding GPIO pin.

Call this function after using gpio_install_isr_service() to install the driver's GPIO ISR handler service.

The pin ISR handlers no longer need to be declared with IRAM_ATTR, unless you pass the ESP_INTR_FLAG_IRAM flag when allocating the ISR in gpio_install_isr_service().

This ISR handler will be called from an ISR. So there is a stack size limit (configurable as "ISR stack size" in menuconfig). This limit is smaller compared to a global GPIO interrupt handler due to the additional level of indirection.

Parameters

gpio_num -- GPIO number
isr_handler -- ISR handler function for the corresponding GPIO number.
args -- parameter for ISR handler.

Returns

ESP_OK Success
ESP_ERR_INVALID_STATE Wrong state, the ISR service has not been initialized.
ESP_ERR_INVALID_ARG Parameter error

esp_err_t gpio_isr_handler_remove(gpio_num_t gpio_num)

Remove ISR handler for the corresponding GPIO pin.

Parameters

gpio_num -- GPIO number

Returns

ESP_OK Success
ESP_ERR_INVALID_STATE Wrong state, the ISR service has not been initialized.
ESP_ERR_INVALID_ARG Parameter error

esp_err_t gpio_set_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t strength)

Set GPIO pad drive capability.

Parameters

gpio_num -- GPIO number, only support output GPIOs
strength -- Drive capability of the pad

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t gpio_get_drive_capability(gpio_num_t gpio_num, gpio_drive_cap_t *strength)

Get GPIO pad drive capability.

Parameters

gpio_num -- GPIO number, only support output GPIOs
strength -- Pointer to accept drive capability of the pad

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

esp_err_t gpio_hold_en(gpio_num_t gpio_num)

Enable gpio pad hold function.

When a GPIO is set to hold, its state is latched at that moment and will not change when the internal signal or the IO MUX/GPIO configuration is modified (including input enable, output enable, output value, function, and drive strength values). This function can be used to retain the state of GPIOs when the chip or system is reset, for example, when watchdog time-out or Deep-sleep events are triggered.

This function works in both input and output modes, and only applicable to output-capable GPIOs. If this function is enabled: in output mode: the output level of the GPIO will be locked and can not be changed. in input mode: the input read value can still reflect the changes of the input signal.

However, on ESP32/S2/C3/S3/C2, this function cannot be used to hold the state of a digital GPIO during Deep-sleep. Even if this function is enabled, the digital GPIO will be reset to its default state when the chip wakes up from Deep-sleep. If you want to hold the state of a digital GPIO during Deep-sleep, please call gpio_deep_sleep_hold_en.

Power down or call gpio_hold_dis will disable this function.

Parameters

gpio_num -- GPIO number, only support output-capable GPIOs

Returns

ESP_OK Success
ESP_ERR_NOT_SUPPORTED Not support pad hold function

esp_err_t gpio_hold_dis(gpio_num_t gpio_num)

Disable gpio pad hold function.

When the chip is woken up from Deep-sleep, the gpio will be set to the default mode, so, the gpio will output the default level if this function is called. If you don't want the level changes, the gpio should be configured to a known state before this function is called. e.g. If you hold gpio18 high during Deep-sleep, after the chip is woken up and gpio_hold_dis is called, gpio18 will output low level(because gpio18 is input mode by default). If you don't want this behavior, you should configure gpio18 as output mode and set it to hight level before calling gpio_hold_dis.

Parameters

gpio_num -- GPIO number, only support output-capable GPIOs

Returns

ESP_OK Success
ESP_ERR_NOT_SUPPORTED Not support pad hold function

void gpio_iomux_in(uint32_t gpio_num, uint32_t signal_idx)

SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP.

Set pad input to a peripheral signal through the IOMUX.

Parameters

gpio_num -- GPIO number of the pad.
signal_idx -- Peripheral signal id to input. One of the *_IN_IDX signals in soc/gpio_sig_map.h.

void gpio_iomux_out(uint8_t gpio_num, int func, bool oen_inv)

Set peripheral output to an GPIO pad through the IOMUX.

Parameters

gpio_num -- gpio_num GPIO number of the pad.
func -- The function number of the peripheral pin to output pin. One of the FUNC_X_* of specified pin (X) in soc/io_mux_reg.h.
oen_inv -- True if the output enable needs to be inverted, otherwise False.

esp_err_t gpio_force_hold_all(void)

Force hold all digital and rtc gpio pads.

GPIO force hold, no matter the chip in active mode or sleep modes.

This function will immediately cause all pads to latch the current values of input enable, output enable, output value, function, and drive strength values.

Warning

This function will hold flash and UART pins as well. Therefore, this function, and all code run afterwards (till calling gpio_force_unhold_all to disable this feature), MUST be placed in internal RAM as holding the flash pins will halt SPI flash operation, and holding the UART pins will halt any UART logging.

esp_err_t gpio_force_unhold_all(void): Force unhold all digital and rtc gpio pads.

esp_err_t gpio_sleep_sel_en(gpio_num_t gpio_num)

Enable SLP_SEL to change GPIO status automantically in lightsleep.

Parameters

gpio_num -- GPIO number of the pad.

Returns

ESP_OK Success

esp_err_t gpio_sleep_sel_dis(gpio_num_t gpio_num)

Disable SLP_SEL to change GPIO status automantically in lightsleep.

Parameters

gpio_num -- GPIO number of the pad.

Returns

ESP_OK Success

esp_err_t gpio_sleep_set_direction(gpio_num_t gpio_num, gpio_mode_t mode)

GPIO set direction at sleep.

Configure GPIO direction,such as output_only,input_only,output_and_input

Parameters

gpio_num -- Configure GPIO pins number, it should be GPIO number. If you want to set direction of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
mode -- GPIO direction

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG GPIO error

esp_err_t gpio_sleep_set_pull_mode(gpio_num_t gpio_num, gpio_pull_mode_t pull)

Configure GPIO pull-up/pull-down resistors at sleep.

Note

ESP32: Only pins that support both input & output have integrated pull-up and pull-down resistors. Input-only GPIOs 34-39 do not.

Parameters

gpio_num -- GPIO number. If you want to set pull up or down mode for e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
pull -- GPIO pull up/down mode.

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG : Parameter error

esp_err_t gpio_dump_io_configuration(FILE *out_stream, uint64_t io_bit_mask)

Dump IO configuration information to console.

Parameters

out_stream -- IO stream (e.g. stdout)
io_bit_mask -- IO pin bit mask, each bit maps to an IO

Returns

ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error

Structures

struct gpio_config_t

Configuration parameters of GPIO pad for gpio_config function.

Public Members

uint64_t pin_bit_mask: GPIO pin: set with bit mask, each bit maps to a GPIO

gpio_mode_t mode: GPIO mode: set input/output mode

gpio_pullup_t pull_up_en: GPIO pull-up

gpio_pulldown_t pull_down_en: GPIO pull-down

gpio_int_type_t intr_type: GPIO interrupt type

gpio_hys_ctrl_mode_t hys_ctrl_mode: GPIO hysteresis: hysteresis filter on slope input

Macros

GPIO_PIN_COUNT

GPIO_IS_VALID_GPIO(gpio_num): Check whether it is a valid GPIO number.

GPIO_IS_VALID_OUTPUT_GPIO(gpio_num): Check whether it can be a valid GPIO number of output mode.

GPIO_IS_VALID_DIGITAL_IO_PAD(gpio_num): Check whether it can be a valid digital I/O pad.

Type Definitions

typedef intr_handle_t gpio_isr_handle_t

typedef void (*gpio_isr_t)(void *arg)

GPIO interrupt handler.

Param arg: User registered data

Header File

components/hal/include/hal/gpio_types.h

Macros

GPIO_PIN_REG_0

GPIO_PIN_REG_1

GPIO_PIN_REG_2

GPIO_PIN_REG_3

GPIO_PIN_REG_4

GPIO_PIN_REG_5

GPIO_PIN_REG_6

GPIO_PIN_REG_7

GPIO_PIN_REG_8

GPIO_PIN_REG_9

GPIO_PIN_REG_10

GPIO_PIN_REG_11

GPIO_PIN_REG_12

GPIO_PIN_REG_13

GPIO_PIN_REG_14

GPIO_PIN_REG_15

GPIO_PIN_REG_16

GPIO_PIN_REG_17

GPIO_PIN_REG_18

GPIO_PIN_REG_19

GPIO_PIN_REG_20

GPIO_PIN_REG_21

GPIO_PIN_REG_22

GPIO_PIN_REG_23

GPIO_PIN_REG_24

GPIO_PIN_REG_25

GPIO_PIN_REG_26

GPIO_PIN_REG_27

GPIO_PIN_REG_28

GPIO_PIN_REG_29

GPIO_PIN_REG_30

GPIO_PIN_REG_31

GPIO_PIN_REG_32

GPIO_PIN_REG_33

GPIO_PIN_REG_34

GPIO_PIN_REG_35

GPIO_PIN_REG_36

GPIO_PIN_REG_37

GPIO_PIN_REG_38

GPIO_PIN_REG_39

GPIO_PIN_REG_40

GPIO_PIN_REG_41

GPIO_PIN_REG_42

GPIO_PIN_REG_43

GPIO_PIN_REG_44

GPIO_PIN_REG_45

GPIO_PIN_REG_46

GPIO_PIN_REG_47

GPIO_PIN_REG_48

Enumerations

enum gpio_port_t

Values:

enumerator GPIO_PORT_0

enumerator GPIO_PORT_MAX

enum gpio_num_t

Values:

enumerator GPIO_NUM_NC: Use to signal not connected to S/W

enumerator GPIO_NUM_0: GPIO0, input and output

enumerator GPIO_NUM_1: GPIO1, input and output

enumerator GPIO_NUM_2: GPIO2, input and output

enumerator GPIO_NUM_3: GPIO3, input and output

enumerator GPIO_NUM_4: GPIO4, input and output

enumerator GPIO_NUM_5: GPIO5, input and output

enumerator GPIO_NUM_6: GPIO6, input and output

enumerator GPIO_NUM_7: GPIO7, input and output

enumerator GPIO_NUM_8: GPIO8, input and output

enumerator GPIO_NUM_9: GPIO9, input and output

enumerator GPIO_NUM_10: GPIO10, input and output

enumerator GPIO_NUM_11: GPIO11, input and output

enumerator GPIO_NUM_12: GPIO12, input and output

enumerator GPIO_NUM_13: GPIO13, input and output

enumerator GPIO_NUM_14: GPIO14, input and output

enumerator GPIO_NUM_15: GPIO15, input and output

enumerator GPIO_NUM_16: GPIO16, input and output

enumerator GPIO_NUM_17: GPIO17, input and output

enumerator GPIO_NUM_18: GPIO18, input and output

enumerator GPIO_NUM_19: GPIO19, input and output

enumerator GPIO_NUM_20: GPIO20, input and output

enumerator GPIO_NUM_21: GPIO21, input and output

enumerator GPIO_NUM_22: GPIO22, input and output

enumerator GPIO_NUM_23: GPIO23, input and output

enumerator GPIO_NUM_24: GPIO24, input and output

enumerator GPIO_NUM_25: GPIO25, input and output

enumerator GPIO_NUM_26: GPIO26, input and output

enumerator GPIO_NUM_27: GPIO27, input and output

enumerator GPIO_NUM_MAX

enum gpio_int_type_t

Values:

enumerator GPIO_INTR_DISABLE: Disable GPIO interrupt

enumerator GPIO_INTR_POSEDGE: GPIO interrupt type : rising edge

enumerator GPIO_INTR_NEGEDGE: GPIO interrupt type : falling edge

enumerator GPIO_INTR_ANYEDGE: GPIO interrupt type : both rising and falling edge

enumerator GPIO_INTR_LOW_LEVEL: GPIO interrupt type : input low level trigger

enumerator GPIO_INTR_HIGH_LEVEL: GPIO interrupt type : input high level trigger

enumerator GPIO_INTR_MAX

enum gpio_mode_t

Values:

enumerator GPIO_MODE_DISABLE: GPIO mode : disable input and output

enumerator GPIO_MODE_INPUT: GPIO mode : input only

enumerator GPIO_MODE_OUTPUT: GPIO mode : output only mode

enumerator GPIO_MODE_OUTPUT_OD: GPIO mode : output only with open-drain mode

enumerator GPIO_MODE_INPUT_OUTPUT_OD: GPIO mode : output and input with open-drain mode

enumerator GPIO_MODE_INPUT_OUTPUT: GPIO mode : output and input mode

enum gpio_pullup_t

Values:

enumerator GPIO_PULLUP_DISABLE: Disable GPIO pull-up resistor

enumerator GPIO_PULLUP_ENABLE: Enable GPIO pull-up resistor

enum gpio_pulldown_t

Values:

enumerator GPIO_PULLDOWN_DISABLE: Disable GPIO pull-down resistor

enumerator GPIO_PULLDOWN_ENABLE: Enable GPIO pull-down resistor

enum gpio_pull_mode_t

Values:

enumerator GPIO_PULLUP_ONLY: Pad pull up

enumerator GPIO_PULLDOWN_ONLY: Pad pull down

enumerator GPIO_PULLUP_PULLDOWN: Pad pull up + pull down

enumerator GPIO_FLOATING: Pad floating

enum gpio_drive_cap_t

Values:

enumerator GPIO_DRIVE_CAP_0: Pad drive capability: weak

enumerator GPIO_DRIVE_CAP_1: Pad drive capability: stronger

enumerator GPIO_DRIVE_CAP_2: Pad drive capability: medium

enumerator GPIO_DRIVE_CAP_DEFAULT: Pad drive capability: medium

enumerator GPIO_DRIVE_CAP_3: Pad drive capability: strongest

enumerator GPIO_DRIVE_CAP_MAX

enum gpio_hys_ctrl_mode_t

Available option for configuring hysteresis feature of GPIOs.

Values:

enumerator GPIO_HYS_CTRL_EFUSE: Pad input hysteresis ctrl by efuse

enumerator GPIO_HYS_SOFT_ENABLE: Pad input hysteresis enable by software

enumerator GPIO_HYS_SOFT_DISABLE: Pad input hysteresis disable by software

API Reference - GPIO Glitch Filter

Header File

components/driver/gpio/include/driver/gpio_filter.h

Functions

esp_err_t gpio_new_pin_glitch_filter(const gpio_pin_glitch_filter_config_t *config, gpio_glitch_filter_handle_t *ret_filter)

Create a pin glitch filter.

Note

Pin glitch filter parameters are fixed, pulses shorter than two sample clocks (IO-MUX's source clock) will be filtered out. It's independent with "flex" glitch filter. See also gpio_new_flex_glitch_filter.

Note

The created filter handle can later be deleted by gpio_del_glitch_filter.

Parameters

config -- [in] Glitch filter configuration
ret_filter -- [out] Returned glitch filter handle

Returns

ESP_OK: Create a pin glitch filter successfully
ESP_ERR_INVALID_ARG: Create a pin glitch filter failed because of invalid arguments (e.g. wrong GPIO number)
ESP_ERR_NO_MEM: Create a pin glitch filter failed because of out of memory
ESP_FAIL: Create a pin glitch filter failed because of other error

esp_err_t gpio_new_flex_glitch_filter(const gpio_flex_glitch_filter_config_t *config, gpio_glitch_filter_handle_t *ret_filter)

Allocate a flex glitch filter.

Note

"flex" means the filter parameters (window, threshold) are adjustable. It's independent with pin glitch filter. See also gpio_new_pin_glitch_filter.

Note

The created filter handle can later be deleted by gpio_del_glitch_filter.

Parameters

config -- [in] Glitch filter configuration
ret_filter -- [out] Returned glitch filter handle

Returns

ESP_OK: Allocate a flex glitch filter successfully
ESP_ERR_INVALID_ARG: Allocate a flex glitch filter failed because of invalid arguments (e.g. wrong GPIO number, filter parameters out of range)
ESP_ERR_NO_MEM: Allocate a flex glitch filter failed because of out of memory
ESP_ERR_NOT_FOUND: Allocate a flex glitch filter failed because the underlying hardware resources are used up
ESP_FAIL: Allocate a flex glitch filter failed because of other error

esp_err_t gpio_del_glitch_filter(gpio_glitch_filter_handle_t filter)

Delete a glitch filter.

Parameters

filter -- [in] Glitch filter handle returned from gpio_new_flex_glitch_filter or gpio_new_pin_glitch_filter

Returns

ESP_OK: Delete glitch filter successfully
ESP_ERR_INVALID_ARG: Delete glitch filter failed because of invalid arguments
ESP_ERR_INVALID_STATE: Delete glitch filter failed because the glitch filter is still in working
ESP_FAIL: Delete glitch filter failed because of other error

esp_err_t gpio_glitch_filter_enable(gpio_glitch_filter_handle_t filter)

Enable a glitch filter.

Parameters

filter -- [in] Glitch filter handle returned from gpio_new_flex_glitch_filter or gpio_new_pin_glitch_filter

Returns

ESP_OK: Enable glitch filter successfully
ESP_ERR_INVALID_ARG: Enable glitch filter failed because of invalid arguments
ESP_ERR_INVALID_STATE: Enable glitch filter failed because the glitch filter is already enabled
ESP_FAIL: Enable glitch filter failed because of other error

esp_err_t gpio_glitch_filter_disable(gpio_glitch_filter_handle_t filter)

Disable a glitch filter.

Parameters

filter -- [in] Glitch filter handle returned from gpio_new_flex_glitch_filter or gpio_new_pin_glitch_filter

Returns

ESP_OK: Disable glitch filter successfully
ESP_ERR_INVALID_ARG: Disable glitch filter failed because of invalid arguments
ESP_ERR_INVALID_STATE: Disable glitch filter failed because the glitch filter is not enabled yet
ESP_FAIL: Disable glitch filter failed because of other error

Structures

struct gpio_pin_glitch_filter_config_t

Configuration of GPIO pin glitch filter.

Public Members

glitch_filter_clock_source_t clk_src: Clock source for the glitch filter

gpio_num_t gpio_num: GPIO number

struct gpio_flex_glitch_filter_config_t

Configuration of GPIO flex glitch filter.

Public Members

glitch_filter_clock_source_t clk_src: Clock source for the glitch filter

gpio_num_t gpio_num: GPIO number

uint32_t window_width_ns: Sample window width (in ns)

uint32_t window_thres_ns: Sample window threshold (in ns), during the window_width_ns sample window, any pulse whose width < window_thres_ns will be discarded.

Type Definitions

typedef struct gpio_glitch_filter_t *gpio_glitch_filter_handle_t: Typedef of GPIO glitch filter handle.

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