# Support for External RAM

[中文]

## Introduction

ESP32-P4 has a few hundred kilobytes of internal RAM, residing on the same die as the rest of the chip components. It can be insufficient for some purposes, so ESP32-P4 has the ability to use up to 64 MB of virtual addresses for external PSRAM (Psuedostatic RAM) memory. The external memory is incorporated in the memory map and, with certain restrictions, is usable in the same way as internal data RAM.

## Hardware

ESP32-P4 supports PSRAM connected in parallel with the SPI flash chip. While ESP32-P4 is capable of supporting several types of RAM chips, ESP-IDF currently only supports Espressif branded PSRAM chips (e.g., ESP-PSRAM32, ESP-PSRAM64, etc).

Note

Some PSRAM chips are 1.8 V devices and some are 3.3 V. Consult the datasheet for your PSRAM chip and ESP32-P4 device to find out the working voltages.

By default, the PSRAM is powered up by the on-chip LDO2. You can use CONFIG_ESP_LDO_CHAN_PSRAM_DOMAIN to switch the LDO channel accordingly. Set this value to -1 to use an external power supply, which means the on-chip LDO will not be used. By default, the PSRAM connected to LDO is set to the correct voltage based on the Espressif module used. You can still use CONFIG_ESP_LDO_VOLTAGE_PSRAM_DOMAIN to select the LDO output voltage if you are not using an Espressif module. When using an external power supply, this option does not exist.

Note

Espressif produces both modules and system-in-package chips that integrate compatible PSRAM and flash and are ready to mount on a product PCB. Consult the Espressif website for more information. If you are using a custom PSRAM chip, ESP-IDF SDK might not be compatible with it.

For specific details about connecting the SoC or module pins to an external PSRAM chip, consult the SoC or module datasheet.

## Configuring External RAM

Note

The `SPI RAM` configuration options are available only if the `esp_psram` component is included in the build. To include `SPI RAM` into your project, add the `esp_psram` component as a dependency in either `REQUIRES` or `PRIV_REQUIRES` when registering your component with `idf_component_register`.

ESP-IDF fully supports the use of external RAM in applications. Once the external RAM is initialized at startup, ESP-IDF can be configured to integrate the external RAM in several ways:

- Integrate RAM into the ESP32-P4 Memory Map

- Add External RAM to the Capability Allocator

- Provide External RAM via malloc() (default)

- Allow .bss Segment to Be Placed in External Memory

- Allow .noinit Segment to Be Placed in External Memory

- Execute In Place (XiP) from PSRAM

### Integrate RAM into the ESP32-P4 Memory Map

Select this option by choosing `Integrate RAM into memory map` from CONFIG_SPIRAM_USE.

This is the most basic option for external RAM integration. Most likely, you will need another, more advanced option.

During the ESP-IDF startup, external RAM is mapped into the data virtual address space. The address space is dynamically allocated. The length will be the minimum length between the PSRAM size and the available data virtual address space size.

Applications can manually place data in external memory by creating pointers to this region. So if an application uses external memory, it is responsible for all management of the external RAM: coordinating buffer usage, preventing corruption, etc.

It is recommended to access the PSRAM by ESP-IDF heap memory allocator (see next chapter).

### Add External RAM to the Capability Allocator

Select this option by choosing `Add RAM to heap_caps allocator (malloc() stays internal by default)` from CONFIG_SPIRAM_USE.

When enabled, memory is mapped to data virtual address space and also added to the capabilities-based heap memory allocator using `MALLOC_CAP_SPIRAM`. Since this memory is also tagged with `MALLOC_CAP_DEFAULT`, calls such as `heap_caps_malloc(size, MALLOC_CAP_DEFAULT)` can still return PSRAM pointers.

To explicitly allocate memory from external RAM, a program should call `heap_caps_malloc(size, MALLOC_CAP_SPIRAM)`. After use, this memory can be freed by calling the normal `free()` function.

In this mode, standard `malloc()` does not allocate from external RAM by default because it uses a separate default allocation policy.

### Provide External RAM via malloc()

Select this option by choosing `Make RAM allocatable using malloc() as well` from CONFIG_SPIRAM_USE. This is the default option.

In this case, memory is added to the capability allocator as described for the previous option. However, it is also added to the pool of RAM that can be returned by the standard `malloc()` function.

This allows any application to use the external RAM without having to rewrite the code to use `heap_caps_malloc(..., MALLOC_CAP_SPIRAM)`.

An additional configuration item, CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL, can be used to set the size threshold when a single allocation should prefer external memory:

- When allocating a size less than or equal to the threshold, the allocator will try internal memory first.

- When allocating a size larger than the threshold, the allocator will try external memory first.

If a suitable block of preferred internal/external memory is not available, the allocator will try the other type of memory.

Because some buffers can only be allocated in internal memory, a second configuration item CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL reserves a pool of internal DMA-capable memory at startup (in `main_task`, after PSRAM is initialized). The pool is malloc from the regular internal heaps and re-registered as separate heap pool.

The reserved pool uses the heap capability priority mechanism:

- Medium priority — `MALLOC_CAP_DMA | MALLOC_CAP_INTERNAL`: explicit `heap_caps_malloc()` requests with these flags are preferentially served from this pool.

- Low priority — `MALLOC_CAP_DEFAULT`: `malloc()` may use the pool only after other internal heaps with higher-priority `MALLOC_CAP_DEFAULT` are exhausted.

Therefore, under normal conditions `malloc()` does not allocate from this pool, but it can fall back to it as a last resort before allocation fails entirely.

### Allow .bss Segment to Be Placed in External Memory

Enable this option by checking CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY.

If enabled, the region of the data virtual address space where the PSRAM is mapped to will be used to store zero-initialized data (BSS segment) from the lwIP, net80211, libpp, wpa_supplicant and bluedroid ESP-IDF libraries.

Additional data can be moved from the internal BSS segment to external RAM by applying the macro `EXT_RAM_BSS_ATTR` to any static declaration (which is not initialized to a non-zero value).

It is also possible to place the BSS section of a component or a library to external RAM using linker fragment scheme `extram_bss`.

This option reduces the internal static memory used by the BSS segment.

Remaining external RAM can also be added to the capability heap allocator using the method shown above.

### Allow .noinit Segment to Be Placed in External Memory

Enable this option by checking CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY. If enabled, the region of the data virtual address space where the PSRAM is mapped to will be used to store non-initialized data. The values placed in this segment will not be initialized or modified even during startup or restart.

By applying the macro `EXT_RAM_NOINIT_ATTR`, data could be moved from the internal NOINIT segment to external RAM. Remaining external RAM can still be added to the capability heap allocator using the method shown above, Add External RAM to the Capability Allocator.

#### Execute In Place (XiP) from PSRAM

The CONFIG_SPIRAM_XIP_FROM_PSRAM option enables the executable in place (XiP) from PSRAM feature. With this option sections that are normally placed in flash, `.text` (for instructions) and `.rodata` (for read only data), will be loaded in PSRAM.

With this option enabled, the cache will not be disabled during an SPI1 flash operation, so code that requires executing during an SPI1 flash operation does not have to be placed in internal RAM.

Since the flash and PSRAM in ESP32-P4 use two separate SPI buses, moving flash content to PSRAM will actually increase the load on the PSRAM MSPI bus. Therefore, the exact impact on performance will be dependent on your app usage of PSRAM.

The PSRAM bus can operate at a higher speed than the flash bus. For example, if the PSRAM is a HEX (16-line PSRAM on ESP32P4) running at 200 MHz, it is significantly faster than a Quad flash (4-line flash) running at 80 MHz.

If the instructions and data previously stored in flash are not accessed frequently, then enabling this option could improve performance. It is recommended to conduct performance profiling to evaluate how this option will affect your system.

## Restrictions

External RAM use has the following restrictions:

- When flash cache is disabled (for example, if the flash is being written to), the external RAM also becomes inaccessible. Any read operations from or write operations to it will lead to an illegal cache access exception. This is also the reason why ESP-IDF does not by default allocate any task stacks in external RAM (see below).

- External RAM uses the same cache region as the external flash. This means that frequently accessed variables in external RAM can be read and modified almost as quickly as in internal RAM. However, when accessing large chunks of data (> 32 KB), the cache can be insufficient, and speeds will fall back to the access speed of the external RAM. Moreover, accessing large chunks of data can "push out" cached flash, possibly making the execution of code slower afterwards.

- In general, external RAM will not be used as task stack memory. `xTaskCreate()` and similar functions will always allocate internal memory for stack and task TCBs.

The option CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM can be used to allow placing task stacks into external memory. In these cases `xTaskCreateStatic()` must be used to specify a task stack buffer allocated from external memory, otherwise task stacks will still be allocated from internal memory.

## Failure to Initialize

By default, failure to initialize external RAM will cause the ESP-IDF startup to abort. This can be disabled by enabling the config item CONFIG_SPIRAM_IGNORE_NOTFOUND.

## Encryption

It is possible to enable automatic encryption for data stored in external RAM. When this is enabled any data read and written through the cache will automatically be encrypted or decrypted by the external memory encryption hardware.

This feature is enabled whenever flash encryption is enabled. For more information on how to enable and how it works see Flash Encryption.

On ESP32-P4, PSRAM encryption can be controlled on a per-MMU-page basis, allowing individual PSRAM pages to be selectively encrypted or left unencrypted. However, in the default configuration, all PSRAM pages are encrypted when flash encryption is enabled.

### Reserving an Unencrypted PSRAM Region

Enabling CONFIG_SPIRAM_ENC_EXEMPT reserves a region at the upper end of PSRAM (highest physical addresses; sized by CONFIG_SPIRAM_ENC_EXEMPT_SIZE, in KB, rounded up to the MMU page size) that is mapped without encryption. This region is registered as a separate heap pool reachable only via the `MALLOC_CAP_SPIRAM_NO_ENC` capability. The rest of PSRAM (and flash) remains encrypted.

Warning

Memory allocated with `MALLOC_CAP_SPIRAM_NO_ENC` is stored as plaintext in PSRAM and can be observed by an attacker with physical access to the PSRAM interface. Never place TLS state, keys, or other secrets in this region.

Typical use case: PSRAM encryption imposes alignment constraints on buffers that some DMA engines (for example, 2D-DMA) cannot satisfy. Buffers that need to be DMA-accessed from such engines can be allocated from this unencrypted region:

    #if CONFIG_SPIRAM_ENC_EXEMPT
    uint32_t caps = MALLOC_CAP_SPIRAM_NO_ENC;
    #else
    uint32_t caps = MALLOC_CAP_SPIRAM;
    #endif
    uint8_t *buf = heap_caps_malloc(buf_size, caps);

`MALLOC_CAP_SPIRAM_NO_ENC` must be requested explicitly. It is intentionally not combined with `MALLOC_CAP_SPIRAM` or `MALLOC_CAP_DEFAULT`, so ordinary SPIRAM/heap allocations cannot accidentally land in the unencrypted region.

To verify after the fact that a buffer was allocated from the unencrypted carve-out (for example after a `heap_caps_malloc_prefer()` call that may have fallen back to encrypted PSRAM), use `esp_psram_ptr_is_no_enc()`.

On ESP32-P4, PSRAM encryption can use an independent encryption key. If the PSRAM encryption key is not programmed, the flash encryption key will be used as the PSRAM encryption key.

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