SD Pull-up Requirements

Espressif hardware products are designed for multiple use cases which may require different pull states on pins. For this reason, the pull state of particular pins on certain products will need to be adjusted to provide the pull-ups required in the SD bus.

SD pull-up requirements apply to cases where ESP32 uses the SPI controller to communicate with SD cards. When an SD card is operating in SPI mode or 1-bit SD mode, the CMD and DATA (DAT0 - DAT3) lines of the SD bus must be pulled up by 10 kOhm resistors. Slaves should also have pull-ups on all above-mentioned lines (regardless of whether these lines are connected to the host) in order to prevent SD cards from entering a wrong state.

By default, the MTDI bootstrapping pin is incompatible with the DAT2 line pull-up if the flash voltage is 3.3 V. For more information, see MTDI Strapping Pin below.

This document has the following structure:

Overview of Compatibility

This section provides an overview of compatibility issues that might occur when using SDIO (secure digital input output). Since the SD bus needs to be connected to pull-ups, these issues should be resolved regardless of whether they are related to master (host) or slave (device). Each issue has links to its respective solution. A solution for a host and device may differ.

Systems on a Chip (SoCs)

Systems in Packages (SIP)


Development Boards

Non-Espressif Hosts

Please make sure that your SDIO host provides necessary pull-ups for all SD bus signals.


No Pull-ups

If you use a development board without pull-ups, you can do the following:

  • If your host and slave device are on seperate boards, replace one of them with a board that has pull-ups. For the list of Espressif’s development boards with pull-ups, go to Development Boards.

  • Attach external pull-ups by connecting each pin which requires a pull-up to VDD via a 10 kOhm resistor.

Pull-up Conflicts on GPIO13

If DAT3 of your device is not properly pulled up, you have the following options:

  • Use 1-bit SD mode and tie the device’s DAT3 to VDD

  • Use SPI mode

  • Perform one of the following actions on the GPIO13 pin:
    • Remove the pull-down resistors

    • Attach a pull-up resistor of less than 5 kOhm (2 kOhm suggested)

    • Pull it up or drive it high either by using the host or with 3.3 V on VDD in 1-bit SD mode

Conflicts Between Bootstrap and SDIO on DAT2

There is a conflict between the boot strapping requirements of the ESP32 and the SDIO protocol. For details, see MTDI Strapping Pin.

To resolve the conflict, you have the following options:

  1. (Recommended) Burn the flash voltage selection eFuses. This will permanently configure the internal regulator’s output voltage to 3.3 V, and GPIO12 will not be used as a bootstrapping pin. After that, connect a pull-up resistor to GPIO12.


    Burning eFuses is irreversible! The issue list above might be out of date, so please make sure that the module you are burning has a 3.3 V flash chip by checking the information on If you burn the 3.3 V eFuses on a module with a 1.8 V flash chip, the module will stop functioning.

    If you are sure that you need to irreversibly burn eFuses, go to your ESP-IDF directory and run the following command:

    components/esptool_py/esptool/ set_flash_voltage 3.3V

    This command will burn the XPD_SDIO_TIEH, XPD_SDIO_FORCE, and XPD_SDIO_REG eFuses. After all the three eFuses are burned to value 1, the internal VDD_SDIO flash voltage regulator will be permanently set to 3.3 V. You will see the following log if the burning succeeds: v2.6
    Enable internal flash voltage regulator (VDD_SDIO) to 3.3 V.
    The following eFuses are burned: XPD_SDIO_FORCE, XPD_SDIO_REG, XPD_SDIO_TIEH.
    This is an irreversible operation.
    Type 'BURN' (all capitals) to continue.
    VDD_SDIO setting complete.

    To check the status of the eFuses, run:

    ``components/esptool_py/esptool/ summary``

    If running from an automated flashing script, has an option --do-not-confirm.

    For more details, see ESP32 Technical Reference Manual [PDF].

  2. If using 1-bit SD mode or SPI mode, disconnect the DAT2 pin and make sure it is pulled high. For this, do one the following:

    • Leave the host’s DAT2 floating and directly connect the slave’s DAT2 to VDD.

    • For a slave device, build a firmware with the option SDIO_SLAVE_FLAG_DAT2_DISABLED and re-flash your device. This option will help avoid slave detecting on the DAT2 line. Note that 4-bit SD mode will no longer be supported by the standard Card Common Control Register (CCCR); however, the host will not be aware of that. The use of 4-bit SD mode will have to be disabled on the host’s side.

No Pull-up on GPIO12

Your module is compatible with the SDIO protocol. Just connect GPIO12 to VDD via a 10 kOhm resistor.

Download Mode Not Working (minor issue)

When the GPIO2 pin is pulled high in accordance with the SD pull-up requirements, you cannot enter Download mode because GPIO2 is a bootstrapping pin which in this case must be pulled low.

There are the following solutions:

  • For boards that require shorting the GPIO0 and GPIO2 pins with a jumper, put the jumper in place, and the auto-reset circuit will pull GPIO2 low along with GPIO0 before entering Download mode.

  • For boards with components attached to their GPIO2 pin (such as pull-down resistors and/or LEDs), check the schematic of your development board for anything connected to GPIO2.

    • LEDs would not affect operation in most cases.

    • Pull-down resistors can interfere with DAT0 signals and must be removed.

If the above solutions do not work for you, please determine if it is the host or slave device that has pull-ups affecting their GPIO2, then locate these pull-ups and remove them.