# I80 接口的 LCD

[English]

1. 调用 `esp_lcd_new_i80_bus()` 创建 I80 总线。请为英特尔 8080 并行总线设置以下参数：

   > - `esp_lcd_i80_bus_config_t::clk_src` 设置 I80 总线的时钟源。请注意，不同的 ESP 芯片可能有不同的默认时钟源。

   > - `esp_lcd_i80_bus_config_t::wr_gpio_num` 设置像素时钟的 GPIO 编号（在某些 LCD 规格书中也被称为 `WR`）

   > - `esp_lcd_i80_bus_config_t::dc_gpio_num` 设置数据或命令选择管脚的 GPIO 编号（在某些 LCD 规格书中也被称为 `RS`）

   > - `esp_lcd_i80_bus_config_t::bus_width` 设置数据总线的位宽（仅支持 `8` 位或 `16` 位）

   > - `esp_lcd_i80_bus_config_t::data_gpio_nums` 是数据总线的 GPIO 编号数组。GPIO 的数量应与 `esp_lcd_i80_bus_config_t::bus_width` 的值等同。

   > - `esp_lcd_i80_bus_config_t::max_transfer_bytes` 设置单次传输的最大字节数。

   >     esp_lcd_i80_bus_handle_t i80_bus = NULL;
   >     esp_lcd_i80_bus_config_t bus_config = {
   >         .clk_src = LCD_CLK_SRC_DEFAULT,
   >         .dc_gpio_num = EXAMPLE_PIN_NUM_DC,
   >         .wr_gpio_num = EXAMPLE_PIN_NUM_PCLK,
   >         .data_gpio_nums = {
   >             EXAMPLE_PIN_NUM_DATA0,
   >             EXAMPLE_PIN_NUM_DATA1,
   >             EXAMPLE_PIN_NUM_DATA2,
   >             EXAMPLE_PIN_NUM_DATA3,
   >             EXAMPLE_PIN_NUM_DATA4,
   >             EXAMPLE_PIN_NUM_DATA5,
   >             EXAMPLE_PIN_NUM_DATA6,
   >             EXAMPLE_PIN_NUM_DATA7,
   >         },
   >         .bus_width = 8,
   >         .max_transfer_bytes = EXAMPLE_LCD_H_RES * 100 * sizeof(uint16_t), // 单次最多可传输 100 行像素（假设像素格式为 RGB565）
   >         .dma_burst_size = EXAMPLE_DMA_BURST_SIZE,
   >     };
   >     ESP_ERROR_CHECK(esp_lcd_new_i80_bus(&bus_config, &i80_bus));

2. 从 I80 总线分配一个 LCD IO 设备句柄。在此步骤中，需要提供以下信息：

   > - `esp_lcd_panel_io_i80_config_t::cs_gpio_num` 设置片选管脚的 GPIO 编号。

   > - `esp_lcd_panel_io_i80_config_t::pclk_hz` 设置像素时钟频率 (Hz)。像素时钟频率越高，刷新率越高，但如果 DMA 带宽不足或 LCD 控制器芯片不支持高像素时钟频率，则可能会导致闪烁。

   > - `esp_lcd_panel_io_i80_config_t::lcd_cmd_bits` 和 `esp_lcd_panel_io_i80_config_t::lcd_param_bits` 分别设置 LCD 控制器芯片可识别的命令及参数的位宽。不同芯片对位宽要求不同，请提前参阅 LCD 规格书。

   > - `esp_lcd_panel_io_i80_config_t::trans_queue_depth` 设置在 LCD IO 设备中可以排队的最大传输量。该值越大，可以排队的传输越多，但消耗的内存也越多。

   >     esp_lcd_panel_io_handle_t io_handle = NULL;
   >     esp_lcd_panel_io_i80_config_t io_config = {
   >         .cs_gpio_num = EXAMPLE_PIN_NUM_CS,
   >         .pclk_hz = EXAMPLE_LCD_PIXEL_CLOCK_HZ,
   >         .trans_queue_depth = 10,
   >         .dc_levels = {
   >             .dc_idle_level = 0,
   >             .dc_cmd_level = 0,
   >             .dc_dummy_level = 0,
   >             .dc_data_level = 1,
   >         },
   >         .lcd_cmd_bits = EXAMPLE_LCD_CMD_BITS,
   >         .lcd_param_bits = EXAMPLE_LCD_PARAM_BITS,
   >     };
   >     ESP_ERROR_CHECK(esp_lcd_new_panel_io_i80(i80_bus, &io_config, &io_handle));

3. 安装 LCD 控制器驱动程序。LCD 控制器驱动程序负责向 LCD 控制器芯片发送命令和参数。在此步骤中，需要指定上一步骤中分配到的 I80 IO 设备句柄以及一些面板特定配置：

   > - `esp_lcd_panel_dev_config_t::bits_per_pixel` 设置像素颜色数据的位宽。LCD 驱动程序使用此值计算要发送到 LCD 控制器芯片的字节数。

   > - `esp_lcd_panel_dev_config_t::reset_gpio_num` 设置复位管脚的 GPIO 编号。如果 LCD 控制器芯片没有复位管脚，可将此值设置为 `-1`。

   > - `esp_lcd_panel_dev_config_t::rgb_ele_order` 设置像素颜色数据的颜色顺序。

   >     esp_lcd_panel_dev_config_t panel_config = {
   >         .reset_gpio_num = EXAMPLE_PIN_NUM_RST,
   >         .rgb_ele_order = LCD_RGB_ELEMENT_ORDER_RGB,
   >         .bits_per_pixel = 16,
   >     };
   >     ESP_ERROR_CHECK(esp_lcd_new_panel_st7789(io_handle, &panel_config, &panel_handle));

## API 参考

### Header File

- components/esp_lcd/include/esp_lcd_io_i80.h

- This header file can be included with:

  >     #include "esp_lcd_io_i80.h"

- This header file is a part of the API provided by the `esp_lcd` component. To declare that your component depends on `esp_lcd`, add the following to your CMakeLists.txt:

  >     REQUIRES esp_lcd

  > or

  >     PRIV_REQUIRES esp_lcd

### Functions

esp_err_t esp_lcd_new_i80_bus(const esp_lcd_i80_bus_config_t *bus_config, esp_lcd_i80_bus_handle_t *ret_bus)

  Create Intel 8080 bus handle.

  参数:

    - bus_config -- [in] Bus configuration

    - ret_bus -- [out] Returned bus handle

  返回:

    - ESP_ERR_INVALID_ARG if parameter is invalid

    - ESP_ERR_NO_MEM if out of memory

    - ESP_ERR_NOT_FOUND if no free bus is available

    - ESP_OK on success

esp_err_t esp_lcd_del_i80_bus(esp_lcd_i80_bus_handle_t bus)

  Destroy Intel 8080 bus handle.

  参数:

    bus -- [in] Intel 8080 bus handle, created by `esp_lcd_new_i80_bus()`

  返回:

    - ESP_ERR_INVALID_ARG if parameter is invalid

    - ESP_ERR_INVALID_STATE if there still be some device attached to the bus

    - ESP_OK on success

esp_err_t esp_lcd_new_panel_io_i80(esp_lcd_i80_bus_handle_t bus, const esp_lcd_panel_io_i80_config_t *io_config, esp_lcd_panel_io_handle_t *ret_io)

  Create LCD panel IO, for Intel 8080 interface.

  参数:

    - bus -- [in] Intel 8080 bus handle, created by `esp_lcd_new_i80_bus()`

    - io_config -- [in] IO configuration, for i80 interface

    - ret_io -- [out] Returned panel IO handle

  返回:

    - ESP_ERR_INVALID_ARG if parameter is invalid

    - ESP_ERR_NOT_SUPPORTED if some configuration can't be satisfied, e.g. pixel clock out of the range

    - ESP_ERR_NO_MEM if out of memory

    - ESP_OK on success

void *esp_lcd_i80_alloc_draw_buffer(esp_lcd_panel_io_handle_t io, size_t size, uint32_t caps)

  Allocate a draw buffer that can be used by I80 interfaced LCD panel.

  备注

  This function differs from the normal 'heap_caps_*' functions in that it can also automatically handle the alignment required by DMA burst, cache line size, etc.

  参数:

    - io -- [in] Panel IO handle, created by `esp_lcd_new_panel_io_i80()`

    - size -- [in] Size of memory to be allocated

    - caps -- [in] Bitwise OR of MALLOC_CAP_* flags indicating the type of memory desired for the allocation

  返回:

    Pointer to a new buffer of size 'size' with capabilities 'caps', or NULL if allocation failed

### Structures

struct esp_lcd_i80_bus_config_t

  LCD Intel 8080 bus configuration structure.

  Public Members

  gpio_num_t dc_gpio_num

    GPIO used for D/C line

  gpio_num_t wr_gpio_num

    GPIO used for WR line

  lcd_clock_source_t clk_src

    Clock source for the I80 LCD peripheral

  gpio_num_t data_gpio_nums[ESP_LCD_I80_BUS_WIDTH_MAX]

    GPIOs used for data lines

  size_t bus_width

    Number of data lines, 8 or 16

  size_t max_transfer_bytes

    Maximum transfer size, this determines the length of internal DMA link

  size_t dma_burst_size

    DMA burst size, in bytes

  struct esp_lcd_i80_bus_config_t::extra_i80_bus_flags flags

    Extra bus config flags

  struct extra_i80_bus_flags

    Extra configuration flags for I80 bus.

    Public Members

    uint32_t allow_pd

      If set, driver allows the power domain to be powered off when system enters sleep mode. This can save power, but at the expense of more RAM being consumed to save register context.

struct esp_lcd_panel_io_i80_config_t

  Panel IO configuration structure, for intel 8080 interface.

  Public Members

  gpio_num_t cs_gpio_num

    GPIO used for CS line, set to -1 will declaim exclusively use of I80 bus

  uint32_t pclk_hz

    Frequency of pixel clock

  size_t trans_queue_depth

    Transaction queue size, larger queue, higher throughput

  esp_lcd_panel_io_color_trans_done_cb_t on_color_trans_done

    Callback invoked when color data was transferred done

  void *user_ctx

    User private data, passed directly to on_color_trans_done's user_ctx

  int lcd_cmd_bits

    Bit-width of LCD command

  int lcd_param_bits

    Bit-width of LCD parameter

  struct esp_lcd_panel_io_i80_config_t::i80_panel_io_dc_levels dc_levels

    Each i80 device might have its own D/C control logic

  struct esp_lcd_panel_io_i80_config_t::extra_i80_panel_io_flags flags

    Extra panel IO config flags

  struct extra_i80_panel_io_flags

    Extra configuration flags for I80 panel IO.

    Public Members

    unsigned int cs_active_high

      If set, a high level of CS line will select the device, otherwise, CS line is low level active

    unsigned int reverse_color_bits

      Reverse the data bits, D[N:0] -> D[0:N]

    unsigned int swap_color_bytes

      Swap adjacent two color bytes

    unsigned int pclk_active_neg

      The display will write data lines when there's a falling edge on WR signal (a.k.a the PCLK)

    unsigned int pclk_idle_low

      The WR signal (a.k.a the PCLK) stays at low level in IDLE phase

  struct i80_panel_io_dc_levels

    D/C line levels configuration.

    Public Members

    unsigned int dc_idle_level

      Level of DC line in IDLE phase

    unsigned int dc_cmd_level

      Level of DC line in CMD phase

    unsigned int dc_dummy_level

      Level of DC line in DUMMY phase

    unsigned int dc_data_level

      Level of DC line in DATA phase

### Macros

ESP_LCD_I80_BUS_WIDTH_MAX

  Maximum width of I80 bus

### Type Definitions

typedef struct esp_lcd_i80_bus_t *esp_lcd_i80_bus_handle_t

  Type of LCD intel 8080 bus handle

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