# SoC 功能

[English]

此文档介绍了 ESP32-H21 SoC 硬件功能的宏定义。ESP-IDF 中的条件编译指令通常使用这些宏来确定哪些依赖于硬件的功能受到支持，从而控制需编译的代码内容。

备注

目前，这些宏定义不属于公共 API，未来可能发生重大更改。如需了解详情，请前往 ESP-IDF 版本简介。

## API 参考

### Header File

- components/soc/esp32h21/include/soc/soc_caps.h

- This header file can be included with:

  >     #include "soc/soc_caps.h"

### Macros

SOC_UART_SUPPORTED

SOC_GDMA_SUPPORTED

SOC_AHB_GDMA_SUPPORTED

SOC_GPTIMER_SUPPORTED

SOC_ASYNC_MEMCPY_SUPPORTED

SOC_EFUSE_KEY_PURPOSE_FIELD

SOC_EFUSE_SUPPORTED

SOC_RTC_FAST_MEM_SUPPORTED

SOC_RTC_MEM_SUPPORTED

SOC_GPSPI_SUPPORTED

SOC_I2C_SUPPORTED

SOC_SYSTIMER_SUPPORTED

SOC_MPI_SUPPORTED

SOC_SHA_SUPPORTED

SOC_HMAC_SUPPORTED

SOC_DIG_SIGN_SUPPORTED

SOC_ECC_SUPPORTED

SOC_ECC_EXTENDED_MODES_SUPPORTED

SOC_ECDSA_SUPPORTED

SOC_FLASH_ENC_SUPPORTED

SOC_SECURE_BOOT_SUPPORTED

SOC_WDT_SUPPORTED

SOC_SPI_FLASH_SUPPORTED

SOC_MODEM_CLOCK_SUPPORTED

SOC_AES_SUPPORTED

SOC_PAU_SUPPORTED

SOC_XTAL_SUPPORT_32M

SOC_XTAL_CLOCK_PATH_DEPENDS_ON_TOP_DOMAIN

SOC_AES_SUPPORT_DMA

SOC_AES_GDMA

SOC_AES_SUPPORT_AES_128

SOC_AES_SUPPORT_AES_256

SOC_AES_SUPPORT_PSEUDO_ROUND_FUNCTION

SOC_ADC_PERIPH_NUM

  < SAR ADC Module

SOC_ADC_CHANNEL_NUM(PERIPH_NUM)

SOC_ADC_MAX_CHANNEL_NUM

SOC_ADC_ATTEN_NUM

  Digital

SOC_ADC_DIGI_CONTROLLER_NUM

SOC_ADC_PATT_LEN_MAX

  One pattern table, each contains 8 items. Each item takes 1 byte

SOC_ADC_DIGI_MAX_BITWIDTH

SOC_ADC_DIGI_MIN_BITWIDTH

SOC_ADC_DIGI_IIR_FILTER_NUM

SOC_ADC_DIGI_MONITOR_NUM

SOC_ADC_DIGI_RESULT_BYTES

SOC_ADC_DIGI_DATA_BYTES_PER_CONV

  F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interval<= 4095

SOC_ADC_SAMPLE_FREQ_THRES_HIGH

SOC_ADC_SAMPLE_FREQ_THRES_LOW

  RTC

SOC_ADC_RTC_MIN_BITWIDTH

SOC_ADC_RTC_MAX_BITWIDTH

  Calibration

SOC_APB_BACKUP_DMA

  < Interrupt

  < ADC power control is shared by PWDET

SOC_BROWNOUT_RESET_SUPPORTED

SOC_SHARED_IDCACHE_SUPPORTED

SOC_CACHE_FREEZE_SUPPORTED

SOC_CPU_CORES_NUM

SOC_CPU_INTR_NUM

SOC_CPU_HAS_FLEXIBLE_INTC

SOC_INT_PLIC_SUPPORTED

SOC_CPU_HAS_CSR_PC

SOC_CPU_BREAKPOINTS_NUM

SOC_CPU_WATCHPOINTS_NUM

SOC_CPU_WATCHPOINT_MAX_REGION_SIZE

SOC_CPU_HAS_PMA

SOC_CPU_IDRAM_SPLIT_USING_PMP

SOC_CPU_PMP_REGION_GRANULARITY

SOC_MMU_PERIPH_NUM

SOC_MMU_LINEAR_ADDRESS_REGION_NUM

SOC_MMU_DI_VADDR_SHARED

  D/I vaddr are shared

SOC_DS_SIGNATURE_MAX_BIT_LEN

  The maximum length of a Digital Signature in bits.

SOC_DS_KEY_PARAM_MD_IV_LENGTH

  Initialization vector (IV) length for the RSA key parameter message digest (MD) in bytes.

SOC_DS_KEY_CHECK_MAX_WAIT_US

  Maximum wait time for DS parameter decryption key. If overdue, then key error. See TRM DS chapter for more details

SOC_AHB_GDMA_VERSION

SOC_GDMA_NUM_GROUPS_MAX

SOC_GDMA_PAIRS_PER_GROUP_MAX

SOC_GDMA_SUPPORT_SLEEP_RETENTION

SOC_ETM_GROUPS

SOC_ETM_CHANNELS_PER_GROUP

SOC_GPIO_PORT

SOC_GPIO_PIN_COUNT

SOC_GPIO_SUPPORT_PIN_HYS_FILTER

SOC_GPIO_SUPPORT_RTC_INDEPENDENT

SOC_LP_IO_CLOCK_IS_INDEPENDENT

SOC_GPIO_VALID_GPIO_MASK

SOC_GPIO_VALID_OUTPUT_GPIO_MASK

SOC_GPIO_IN_RANGE_MAX

SOC_GPIO_OUT_RANGE_MAX

SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK

SOC_GPIO_SUPPORT_FORCE_HOLD

SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP

SOC_RTCIO_PIN_COUNT

SOC_RTCIO_HOLD_SUPPORTED

SOC_DEDIC_GPIO_OUT_CHANNELS_NUM

  8 outward channels on each CPU core

SOC_DEDIC_GPIO_IN_CHANNELS_NUM

  8 inward channels on each CPU core

SOC_DEDIC_PERIPH_ALWAYS_ENABLE

  The dedicated GPIO (a.k.a. fast GPIO) is featured by some customized CPU instructions, which is always enabled

SOC_ANA_CMPR_NUM

SOC_ANA_CMPR_INTR_SHARE_WITH_GPIO

SOC_I2C_NUM

SOC_HP_I2C_NUM

SOC_I2C_FIFO_LEN

  I2C hardware FIFO depth

SOC_I2C_CMD_REG_NUM

  Number of I2C command registers

SOC_I2C_SUPPORT_SLAVE

SOC_I2C_SUPPORT_HW_FSM_RST

SOC_I2C_SUPPORT_HW_CLR_BUS

SOC_I2C_SUPPORT_XTAL

SOC_I2C_SUPPORT_RTC

SOC_I2C_SUPPORT_10BIT_ADDR

SOC_I2C_SLAVE_SUPPORT_BROADCAST

SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE

SOC_I2C_SLAVE_SUPPORT_I2CRAM_ACCESS

SOC_I2C_SLAVE_SUPPORT_SLAVE_UNMATCH

SOC_LEDC_CHANNEL_NUM

SOC_MPI_MEM_BLOCKS_NUM

SOC_MPI_OPERATIONS_NUM

SOC_RSA_MAX_BIT_LEN

SOC_SHA_DMA_MAX_BUFFER_SIZE

SOC_SHA_SUPPORT_DMA

SOC_SHA_SUPPORT_RESUME

SOC_SHA_GDMA

SOC_SHA_SUPPORT_SHA1

SOC_SHA_SUPPORT_SHA224

SOC_SHA_SUPPORT_SHA256

SOC_ECC_CONSTANT_TIME_POINT_MUL

SOC_SPI_PERIPH_NUM

SOC_SPI_PERIPH_CS_NUM(i)

SOC_SPI_MAX_CS_NUM

SOC_SPI_MAXIMUM_BUFFER_SIZE

SOC_SPI_SLAVE_SUPPORT_SEG_TRANS

SOC_SPI_SUPPORT_CD_SIG

SOC_SPI_SUPPORT_CONTINUOUS_TRANS

SOC_SPI_SUPPORT_SLAVE_HD_VER2

SOC_SPI_SUPPORT_CLK_XTAL

SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(host_id)

SOC_SPI_SCT_SUPPORTED

SOC_SPI_SCT_SUPPORTED_PERIPH(PERIPH_NUM)

SOC_SPI_SCT_REG_NUM

SOC_SPI_SCT_BUFFER_NUM_MAX

SOC_SPI_SCT_CONF_BITLEN_MAX

SOC_MEMSPI_IS_INDEPENDENT

SOC_SPI_MAX_PRE_DIVIDER

SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE

SOC_SPI_MEM_SUPPORT_AUTO_RESUME

SOC_SPI_MEM_SUPPORT_IDLE_INTR

SOC_SPI_MEM_SUPPORT_SW_SUSPEND

SOC_SPI_MEM_SUPPORT_CHECK_SUS

SOC_SPI_MEM_SUPPORT_WRAP

SOC_MEMSPI_SRC_FREQ_64M_SUPPORTED

SOC_MEMSPI_SRC_FREQ_32M_SUPPORTED

SOC_MEMSPI_SRC_FREQ_16M_SUPPORTED

SOC_SYSTIMER_COUNTER_NUM

SOC_SYSTIMER_ALARM_NUM

SOC_SYSTIMER_BIT_WIDTH_LO

SOC_SYSTIMER_BIT_WIDTH_HI

SOC_SYSTIMER_FIXED_DIVIDER

SOC_SYSTIMER_SUPPORT_RC_FAST

SOC_SYSTIMER_INT_LEVEL

SOC_SYSTIMER_ALARM_MISS_COMPENSATE

SOC_LP_TIMER_BIT_WIDTH_LO

SOC_LP_TIMER_BIT_WIDTH_HI

SOC_TIMER_GROUPS

SOC_TIMER_GROUP_TIMERS_PER_GROUP

SOC_TIMER_GROUP_TOTAL_TIMERS

SOC_TIMER_GROUP_COUNTER_BIT_WIDTH

SOC_TIMER_GROUP_SUPPORT_XTAL

SOC_TIMER_GROUP_SUPPORT_RC_FAST

SOC_TIMER_SUPPORT_SLEEP_RETENTION

SOC_MWDT_SUPPORT_XTAL

SOC_MWDT_SUPPORT_SLEEP_RETENTION

SOC_EFUSE_DIS_PAD_JTAG

SOC_EFUSE_DIS_USB_JTAG

SOC_EFUSE_DIS_DIRECT_BOOT

SOC_EFUSE_SOFT_DIS_JTAG

SOC_EFUSE_DIS_ICACHE

SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK

SOC_EFUSE_ECDSA_KEY

SOC_SECURE_BOOT_V2_RSA

SOC_SECURE_BOOT_V2_ECC

SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS

SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS

SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY

SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX

SOC_FLASH_ENCRYPTION_XTS_AES

SOC_FLASH_ENCRYPTION_XTS_AES_128

SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND

SOC_APM_CTRL_FILTER_SUPPORTED

  Support for APM control filter

SOC_CRYPTO_DPA_PROTECTION_SUPPORTED

SOC_ECDSA_SUPPORT_EXPORT_PUBKEY

SOC_ECDSA_SUPPORT_DETERMINISTIC_MODE

SOC_ECDSA_P192_CURVE_DEFAULT_DISABLED

SOC_UART_NUM

SOC_UART_HP_NUM

SOC_UART_FIFO_LEN

  The UART hardware FIFO length

SOC_UART_BITRATE_MAX

  Max bit rate supported by UART

SOC_UART_SUPPORT_RTC_CLK

  Support RTC clock as the clock source

SOC_UART_SUPPORT_XTAL_CLK

  Support XTAL clock as the clock source

SOC_UART_SUPPORT_WAKEUP_INT

  Support UART wakeup interrupt

SOC_UART_SUPPORT_FSM_TX_WAIT_SEND

SOC_UART_SUPPORT_SLEEP_RETENTION

  Support back up registers before sleep

SOC_UART_WAKEUP_CHARS_SEQ_MAX_LEN

SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE

SOC_UART_WAKEUP_SUPPORT_FIFO_THRESH_MODE

SOC_UART_WAKEUP_SUPPORT_START_BIT_MODE

SOC_UART_WAKEUP_SUPPORT_CHAR_SEQ_MODE

SOC_COEX_HW_PTI

SOC_EXTERNAL_COEX_ADVANCE

  HARDWARE ADVANCED EXTERNAL COEXISTENCE CAPS

SOC_EXTERNAL_COEX_LEADER_TX_LINE

  EXTERNAL COEXISTENCE TX LINE CAPS

SOC_PHY_DIG_REGS_MEM_SIZE

SOC_PM_SUPPORT_BT_WAKEUP

SOC_PM_SUPPORT_EXT1_WAKEUP

SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN

  Supports one bit per pin to configure the EXT1 trigger level

SOC_PM_SUPPORT_CPU_PD

SOC_PM_SUPPORT_MODEM_PD

  modem includes BLE and 15.4

SOC_PM_SUPPORT_XTAL32K_PD

SOC_PM_SUPPORT_RC32K_PD

SOC_PM_SUPPORT_RC_FAST_PD

SOC_PM_SUPPORT_VDDSDIO_PD

SOC_PM_SUPPORT_TOP_PD

SOC_PM_PAU_LINK_NUM

SOC_PM_RETENTION_MODULE_NUM

SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE

SOC_PM_CPU_RETENTION_BY_SW

SOC_PM_MODEM_RETENTION_BY_REGDMA

SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY

  Supports CRC only the stub code in RTC memory

SOC_CLK_XTAL32K_SUPPORTED

  Support to connect an external low frequency crystal

SOC_CLK_OSC_SLOW_SUPPORTED

  Support to connect an external oscillator, not a crystal

SOC_CLK_RC32K_SUPPORTED

  Support an internal 32kHz RC oscillator

SOC_CLK_LP_FAST_SUPPORT_LP_PLL

  Support LP_PLL clock as the LP_FAST clock source

SOC_MODEM_CLOCK_IS_INDEPENDENT

SOC_RCC_IS_INDEPENDENT

  Reset and Clock Control is independent, thanks to the PCR registers

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