Module sleep

Source
Available on crate feature unstable only.
Expand description

§RTC Control Sleep Module

§Overview

The sleep module allows configuring various wakeup sources and setting up the sleep behavior based on those sources. The supported wakeup sources include:

  • GPIO pins - light sleep only
  • timers
  • SDIO (Secure Digital Input/Output) - light sleep only
  • MAC (Media Access Control) wake - light sleep only
  • UART0 - light sleep only
  • UART1 - light sleep only
  • touch
  • ULP (Ultra-Low Power) wake
  • BT (Bluetooth) wake - light sleep only

Structs§

GpioWakeupSource
GPIO wakeup source
RtcConfig
RTC Configuration.
RtcInitConfig
Configuration for RTC initialization.
RtcSleepConfig
Configuration for RTC sleep mode.
RtcioWakeupSource
RTC_IO wakeup source
TimerWakeupSource
Represents a timer wake-up source, triggering an event after a specified duration.
Uart0WakeupSource
UART0 wakeup source
Uart1WakeupSource
UART1 wakeup source
WakeTriggers
Represents the wakeup triggers.

Enums§

Error
Errors that can occur when configuring RTC wake-up sources.
WakeupLevel
Level at which a wake-up event is triggered

Constants§

GPIO_INTR_DISABLE
Disables GPIO interrupt.
GPIO_INTR_HIGH_LEVEL
Sets GPIO interrupt to trigger on a high level signal.
GPIO_INTR_LOW_LEVEL
Sets GPIO interrupt to trigger on a low level signal.
GPIO_NUM_MAX
Maximum number of GPIO pins supported.
OTHER_BLOCKS_POWERUP
Power-up cycles for other hardware blocks.
OTHER_BLOCKS_WAIT
Wait cycles for other hardware blocks to stabilize.
PIN_FUNC_GPIO
Specifies the function configuration for GPIO pins.
RTC_CK8M_ENABLE_WAIT_DEFAULT
Default number of cycles required to enable the internal 8MHz clock.
RTC_CNTL_BIASSLP_MONITOR_DEFAULT
Default bias setting for sleep mode in the monitor mode.
RTC_CNTL_BIASSLP_SLEEP_DEFAULT
Default bias setting during sleep mode.
RTC_CNTL_BIASSLP_SLEEP_ON
Keeps the bias for ultra-low power sleep mode always on.
RTC_CNTL_CK8M_WAIT_DEFAULT
Default number of cycles to wait for the internal 8MHz clock to stabilize.
RTC_CNTL_DBG_ATTEN_DEEPSLEEP_DEFAULT
Default attenuation setting during deep sleep, with maximum voltage drop.
RTC_CNTL_DBG_ATTEN_DEEPSLEEP_NODROP
No attenuation (no voltage drop) during deep sleep.
RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_DEFAULT
Default attenuation setting during light sleep, with a voltage drop.
RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_NODROP
No attenuation (no voltage drop) during light sleep.
RTC_CNTL_DBG_ATTEN_MONITOR_DEFAULT
Default debug attenuation setting for the monitor mode.
RTC_CNTL_DBIAS_0V90
Digital bias voltage level of 0.90V.
RTC_CNTL_DBIAS_0V95
Digital bias voltage level of 0.95V.
RTC_CNTL_DBIAS_1V00
Digital bias voltage level of 1.00V.
RTC_CNTL_DBIAS_1V05
Digital bias voltage level of 1.05V.
RTC_CNTL_DBIAS_1V10
Digital bias voltage level of 1.10V.
RTC_CNTL_DBIAS_1V15
Digital bias voltage level of 1.15V.
RTC_CNTL_DBIAS_1V20
Digital bias voltage level of 1.20V.
RTC_CNTL_DBIAS_1V25
Digital bias voltage level of 1.25V.
RTC_CNTL_DBIAS_1V30
Digital bias voltage level of approximately 1.34V.
RTC_CNTL_DG_VDD_DRV_B_SLP_DEFAULT
Default driver bias setting for the digital domain during sleep mode.
RTC_CNTL_MIN_SLP_VAL_MIN
Minimum number of cycles for sleep duration.
RTC_CNTL_PD_CUR_MONITOR_DEFAULT
Default power-down current setting for the monitor mode.
RTC_CNTL_PD_CUR_SLEEP_DEFAULT
Default power-down current setting during sleep mode.
RTC_CNTL_PD_CUR_SLEEP_ON
Keeps the power-down current setting for sleep mode always on.
RTC_CNTL_PLL_BUF_WAIT_DEFAULT
Default number of cycles to wait for the PLL buffer to stabilize.
RTC_CNTL_XTL_BUF_WAIT_DEFAULT
Default number of cycles to wait for the XTL buffer to stabilize.
SIG_GPIO_OUT_IDX
Index for signaling GPIO output.

Traits§

WakeSource
Trait representing a wakeup source.