esp_hal/soc/esp32c2/efuse/
fields.rs

1//! eFuse fields for the ESP32-C2.
2//!
3//! This file was automatically generated, please do not edit it manually!
4//!
5//! For information on how to regenerate these files, please refer to the
6//! `xtask` package's `README.md` file.
7//!
8//! Generated on:   2024-03-11
9//! ESP-IDF Commit: 0de2912f
10
11use super::EfuseBlock;
12use crate::soc::efuse_field::EfuseField;
13
14/// `[]` Disable programming of individual eFuses
15pub const WR_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 8);
16/// `[]` wr_dis of RD_DIS
17pub const WR_DIS_RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 1);
18/// `[]` wr_dis of WDT_DELAY_SEL
19pub const WR_DIS_WDT_DELAY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 1, 1);
20/// `[]` wr_dis of DIS_PAD_JTAG
21pub const WR_DIS_DIS_PAD_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 1, 1);
22/// `[]` wr_dis of DIS_DOWNLOAD_ICACHE
23pub const WR_DIS_DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 1, 1);
24/// `[]` wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
25pub const WR_DIS_DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField =
26    EfuseField::new(EfuseBlock::Block0, 2, 1);
27/// `[]` wr_dis of SPI_BOOT_CRYPT_CNT
28pub const WR_DIS_SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
29/// `[]` wr_dis of XTS_KEY_LENGTH_256
30pub const WR_DIS_XTS_KEY_LENGTH_256: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
31/// `[]` wr_dis of SECURE_BOOT_EN
32pub const WR_DIS_SECURE_BOOT_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
33/// `[]` wr_dis of UART_PRINT_CONTROL
34pub const WR_DIS_UART_PRINT_CONTROL: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
35/// `[]` wr_dis of FORCE_SEND_RESUME
36pub const WR_DIS_FORCE_SEND_RESUME: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
37/// `[]` wr_dis of DIS_DOWNLOAD_MODE
38pub const WR_DIS_DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
39/// `[]` wr_dis of DIS_DIRECT_BOOT
40pub const WR_DIS_DIS_DIRECT_BOOT: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
41/// `[]` wr_dis of ENABLE_SECURITY_DOWNLOAD
42pub const WR_DIS_ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
43/// `[]` wr_dis of FLASH_TPUW
44pub const WR_DIS_FLASH_TPUW: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
45/// `[]` wr_dis of SECURE_VERSION
46pub const WR_DIS_SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 4, 1);
47/// `[WR_DIS.ENABLE_CUSTOM_MAC]` wr_dis of CUSTOM_MAC_USED
48pub const WR_DIS_CUSTOM_MAC_USED: EfuseField = EfuseField::new(EfuseBlock::Block0, 4, 1);
49/// `[]` wr_dis of DISABLE_WAFER_VERSION_MAJOR
50pub const WR_DIS_DISABLE_WAFER_VERSION_MAJOR: EfuseField =
51    EfuseField::new(EfuseBlock::Block0, 4, 1);
52/// `[]` wr_dis of DISABLE_BLK_VERSION_MAJOR
53pub const WR_DIS_DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 4, 1);
54/// `[WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM]` wr_dis of CUSTOM_MAC
55pub const WR_DIS_CUSTOM_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 5, 1);
56/// `[WR_DIS.MAC_FACTORY]` wr_dis of MAC
57pub const WR_DIS_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
58/// `[]` wr_dis of WAFER_VERSION_MINOR
59pub const WR_DIS_WAFER_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
60/// `[]` wr_dis of WAFER_VERSION_MAJOR
61pub const WR_DIS_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
62/// `[]` wr_dis of PKG_VERSION
63pub const WR_DIS_PKG_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
64/// `[]` wr_dis of BLK_VERSION_MINOR
65pub const WR_DIS_BLK_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
66/// `[]` wr_dis of BLK_VERSION_MAJOR
67pub const WR_DIS_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
68/// `[]` wr_dis of OCODE
69pub const WR_DIS_OCODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
70/// `[]` wr_dis of TEMP_CALIB
71pub const WR_DIS_TEMP_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
72/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN0
73pub const WR_DIS_ADC1_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
74/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN3
75pub const WR_DIS_ADC1_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
76/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN0
77pub const WR_DIS_ADC1_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
78/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN3
79pub const WR_DIS_ADC1_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
80/// `[]` wr_dis of DIG_DBIAS_HVT
81pub const WR_DIS_DIG_DBIAS_HVT: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
82/// `[]` wr_dis of DIG_LDO_SLP_DBIAS2
83pub const WR_DIS_DIG_LDO_SLP_DBIAS2: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
84/// `[]` wr_dis of DIG_LDO_SLP_DBIAS26
85pub const WR_DIS_DIG_LDO_SLP_DBIAS26: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
86/// `[]` wr_dis of DIG_LDO_ACT_DBIAS26
87pub const WR_DIS_DIG_LDO_ACT_DBIAS26: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
88/// `[]` wr_dis of DIG_LDO_ACT_STEPD10
89pub const WR_DIS_DIG_LDO_ACT_STEPD10: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
90/// `[]` wr_dis of RTC_LDO_SLP_DBIAS13
91pub const WR_DIS_RTC_LDO_SLP_DBIAS13: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
92/// `[]` wr_dis of RTC_LDO_SLP_DBIAS29
93pub const WR_DIS_RTC_LDO_SLP_DBIAS29: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
94/// `[]` wr_dis of RTC_LDO_SLP_DBIAS31
95pub const WR_DIS_RTC_LDO_SLP_DBIAS31: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
96/// `[]` wr_dis of RTC_LDO_ACT_DBIAS31
97pub const WR_DIS_RTC_LDO_ACT_DBIAS31: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
98/// `[]` wr_dis of RTC_LDO_ACT_DBIAS13
99pub const WR_DIS_RTC_LDO_ACT_DBIAS13: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
100/// `[]` wr_dis of ADC_CALIBRATION_3
101pub const WR_DIS_ADC_CALIBRATION_3: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
102/// `[WR_DIS.KEY0]` wr_dis of BLOCK_KEY0
103pub const WR_DIS_BLOCK_KEY0: EfuseField = EfuseField::new(EfuseBlock::Block0, 7, 1);
104/// `[]` Disable reading from BlOCK3
105pub const RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 2);
106/// `[]` Read protection for EFUSE_BLK3. KEY0
107pub const RD_DIS_KEY0: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 2);
108/// `[]` Read protection for EFUSE_BLK3. KEY0 lower 128-bit key
109pub const RD_DIS_KEY0_LOW: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 1);
110/// `[]` Read protection for EFUSE_BLK3. KEY0 higher 128-bit key
111pub const RD_DIS_KEY0_HI: EfuseField = EfuseField::new(EfuseBlock::Block0, 33, 1);
112/// `[]` RTC watchdog timeout threshold; in unit of slow clock cycle {0:
113/// "40000"; 1: "80000"; 2: "160000"; 3: "320000"}
114pub const WDT_DELAY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 34, 2);
115/// `[]` Set this bit to disable pad jtag
116pub const DIS_PAD_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 36, 1);
117/// `[]` The bit be set to disable icache in download mode
118pub const DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 37, 1);
119/// `[]` The bit be set to disable manual encryption
120pub const DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField = EfuseField::new(EfuseBlock::Block0, 38, 1);
121/// `[]` Enables flash encryption when 1 or 3 bits are set and disables
122/// otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
123pub const SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 39, 3);
124/// `[]` Flash encryption key length {0: "128 bits key"; 1: "256 bits key"}
125pub const XTS_KEY_LENGTH_256: EfuseField = EfuseField::new(EfuseBlock::Block0, 42, 1);
126/// `[]` Set the default UARTboot message output mode {0: "Enable"; 1: "Enable
127/// when GPIO8 is low at reset"; 2: "Enable when GPIO8 is high at reset"; 3:
128/// "Disable"}
129pub const UART_PRINT_CONTROL: EfuseField = EfuseField::new(EfuseBlock::Block0, 43, 2);
130/// `[]` Set this bit to force ROM code to send a resume command during SPI boot
131pub const FORCE_SEND_RESUME: EfuseField = EfuseField::new(EfuseBlock::Block0, 45, 1);
132/// `[]` Set this bit to disable download mode (boot_mode`[3:0]` = 0; 1; 2; 4;
133/// 5; 6; 7)
134pub const DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 46, 1);
135/// `[]` This bit set means disable direct_boot mode
136pub const DIS_DIRECT_BOOT: EfuseField = EfuseField::new(EfuseBlock::Block0, 47, 1);
137/// `[]` Set this bit to enable secure UART download mode
138pub const ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 48, 1);
139/// `[]` Configures flash waiting time after power-up; in unit of ms. If the
140/// value is less than 15; the waiting time is the configurable value.
141/// Otherwise; the waiting time is twice the configurable value
142pub const FLASH_TPUW: EfuseField = EfuseField::new(EfuseBlock::Block0, 49, 4);
143/// `[]` The bit be set to enable secure boot
144pub const SECURE_BOOT_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 53, 1);
145/// `[]` Secure version for anti-rollback
146pub const SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 54, 4);
147/// `[ENABLE_CUSTOM_MAC]` True if MAC_CUSTOM is burned
148pub const CUSTOM_MAC_USED: EfuseField = EfuseField::new(EfuseBlock::Block0, 58, 1);
149/// `[]` Disables check of wafer version major
150pub const DISABLE_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 59, 1);
151/// `[]` Disables check of blk version major
152pub const DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 60, 1);
153/// `[]` User data block
154pub const USER_DATA: EfuseField = EfuseField::new(EfuseBlock::Block1, 0, 88);
155/// `[MAC_CUSTOM CUSTOM_MAC]` Custom MAC address
156pub const USER_DATA_MAC_CUSTOM: EfuseField = EfuseField::new(EfuseBlock::Block1, 0, 48);
157/// `[MAC_FACTORY]` MAC address
158pub const MAC: EfuseField = EfuseField::new(EfuseBlock::Block2, 0, 48);
159/// `[]` WAFER_VERSION_MINOR
160pub const WAFER_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block2, 48, 4);
161/// `[]` WAFER_VERSION_MAJOR
162pub const WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block2, 52, 2);
163/// `[]` EFUSE_PKG_VERSION
164pub const PKG_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block2, 54, 3);
165/// `[]` Minor version of BLOCK2 {0: "No calib"; 1: "With calib"}
166pub const BLK_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block2, 57, 3);
167/// `[]` Major version of BLOCK2
168pub const BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block2, 60, 2);
169/// `[]` OCode
170pub const OCODE: EfuseField = EfuseField::new(EfuseBlock::Block2, 62, 7);
171/// `[]` Temperature calibration data
172pub const TEMP_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block2, 69, 9);
173/// `[]` ADC1 init code at atten0
174pub const ADC1_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block2, 78, 8);
175/// `[]` ADC1 init code at atten3
176pub const ADC1_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block2, 86, 5);
177/// `[]` ADC1 calibration voltage at atten0
178pub const ADC1_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block2, 91, 8);
179/// `[]` ADC1 calibration voltage at atten3
180pub const ADC1_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block2, 99, 6);
181/// `[]` BLOCK2 digital dbias when hvt
182pub const DIG_DBIAS_HVT: EfuseField = EfuseField::new(EfuseBlock::Block2, 105, 5);
183/// `[]` BLOCK2 DIG_LDO_DBG0_DBIAS2
184pub const DIG_LDO_SLP_DBIAS2: EfuseField = EfuseField::new(EfuseBlock::Block2, 110, 7);
185/// `[]` BLOCK2 DIG_LDO_DBG0_DBIAS26
186pub const DIG_LDO_SLP_DBIAS26: EfuseField = EfuseField::new(EfuseBlock::Block2, 117, 8);
187/// `[]` BLOCK2 DIG_LDO_ACT_DBIAS26
188pub const DIG_LDO_ACT_DBIAS26: EfuseField = EfuseField::new(EfuseBlock::Block2, 125, 6);
189/// `[]` BLOCK2 DIG_LDO_ACT_STEPD10
190pub const DIG_LDO_ACT_STEPD10: EfuseField = EfuseField::new(EfuseBlock::Block2, 131, 4);
191/// `[]` BLOCK2 DIG_LDO_SLP_DBIAS13
192pub const RTC_LDO_SLP_DBIAS13: EfuseField = EfuseField::new(EfuseBlock::Block2, 135, 7);
193/// `[]` BLOCK2 DIG_LDO_SLP_DBIAS29
194pub const RTC_LDO_SLP_DBIAS29: EfuseField = EfuseField::new(EfuseBlock::Block2, 142, 9);
195/// `[]` BLOCK2 DIG_LDO_SLP_DBIAS31
196pub const RTC_LDO_SLP_DBIAS31: EfuseField = EfuseField::new(EfuseBlock::Block2, 151, 6);
197/// `[]` BLOCK2 DIG_LDO_ACT_DBIAS31
198pub const RTC_LDO_ACT_DBIAS31: EfuseField = EfuseField::new(EfuseBlock::Block2, 157, 6);
199/// `[]` BLOCK2 DIG_LDO_ACT_DBIAS13
200pub const RTC_LDO_ACT_DBIAS13: EfuseField = EfuseField::new(EfuseBlock::Block2, 163, 8);
201/// `[]` Store the bit `[86:96]` of ADC calibration data
202pub const ADC_CALIBRATION_3: EfuseField = EfuseField::new(EfuseBlock::Block2, 192, 11);
203/// `[BLOCK_KEY0]` BLOCK_BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryption
204pub const KEY0: EfuseField = EfuseField::new(EfuseBlock::Block3, 0, 256);
205/// `[]` 256bit FE key
206pub const KEY0_FE_256BIT: EfuseField = EfuseField::new(EfuseBlock::Block3, 0, 256);
207/// `[]` 128bit FE key
208pub const KEY0_FE_128BIT: EfuseField = EfuseField::new(EfuseBlock::Block3, 0, 128);
209/// `[]` 128bit SB key
210pub const KEY0_SB_128BIT: EfuseField = EfuseField::new(EfuseBlock::Block3, 128, 128);
esp_hal/soc/esp32c2/efuse/fields.rs

esp_hal/soc/esp32c2/efuse/
fields.rs
