esp_hal/rom/
mod.rs

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1//! # ESP ROM libraries
2//!
3//! ## Overview
4//! The `rom` driver provides functionality related to the ROM (Read-Only
5//! Memory) on ESP chips. It includes implementations for the [CRC (Cyclic
6//! Redundancy Check)] and [MD5 (Message Digest 5)] algorithms.
7//!
8//! The driver's functionality allows users to perform CRC calculations and MD5
9//! hashing using the ROM functions provided by the ESP chip. This can be useful
10//! for various applications that require data integrity checks or cryptographic
11//! operations.
12//!
13//! It uses `CRC` error-checking techniques to detect changes in data during
14//! transmission or storage.
15//!
16//! This module also implements the `MD5` algorithm, which is widely used for
17//! cryptographic hash function. It's commonly used to verify data integrity and
18//! to check whether the data has been modified.
19//!
20//! Safe abstractions to the additional libraries provided in the ESP's
21//! Read-Only Memory.
22//!
23//! [CRC (Cyclic Redundancy Check)]: ./crc/index.html
24//! [MD5 (Message Digest 5)]: ./md5/index.html
25
26#![allow(unused_macros)]
27
28#[cfg(any(rom_crc_be, rom_crc_le))]
29pub mod crc;
30#[cfg(any(rom_md5_bsd, rom_md5_mbedtls))]
31pub mod md5;
32
33#[allow(unused)]
34extern "C" {
35    pub(crate) fn rom_i2c_writeReg(block: u32, block_hostid: u32, reg_add: u32, indata: u32);
36
37    pub(crate) fn rom_i2c_writeReg_Mask(
38        block: u32,
39        block_hostid: u32,
40        reg_add: u32,
41        reg_add_msb: u32,
42        reg_add_lsb: u32,
43        indata: u32,
44    );
45}
46
47macro_rules! regi2c_write {
48    ( $block: ident, $reg_add: ident, $indata: expr ) => {
49        paste::paste! {
50            #[allow(unused_unsafe)]
51            unsafe {
52                $crate::rom::rom_i2c_writeReg(
53                    $block as u32,
54                    [<$block _HOSTID>] as u32,
55                    $reg_add as u32,
56                    $indata as u32
57                )
58            }
59        }
60    };
61}
62
63#[allow(unused_imports)]
64pub(crate) use regi2c_write;
65
66macro_rules! regi2c_write_mask {
67    ( $block: ident, $reg_add: ident, $indata: expr ) => {
68        paste::paste! {
69            #[allow(unused_unsafe)]
70            unsafe {
71                $crate::rom::rom_i2c_writeReg_Mask(
72                    $block as u32,
73                    [<$block _HOSTID>] as u32,
74                    $reg_add as u32,
75                    [<$reg_add _MSB>] as u32,
76                    [<$reg_add _LSB>] as u32,
77                    $indata as u32
78                )
79            }
80        }
81    };
82}
83
84#[allow(unused_imports)]
85pub(crate) use regi2c_write_mask;
86
87#[inline(always)]
88pub(crate) fn ets_delay_us(us: u32) {
89    extern "C" {
90        fn ets_delay_us(us: u32);
91    }
92
93    unsafe { ets_delay_us(us) };
94}
95
96#[allow(unused)]
97#[inline(always)]
98pub(crate) fn ets_update_cpu_frequency_rom(ticks_per_us: u32) {
99    extern "C" {
100        fn ets_update_cpu_frequency(ticks_per_us: u32);
101    }
102
103    unsafe { ets_update_cpu_frequency(ticks_per_us) };
104}
105
106#[inline(always)]
107pub(crate) fn rtc_get_reset_reason(cpu_num: u32) -> u32 {
108    extern "C" {
109        fn rtc_get_reset_reason(cpu_num: u32) -> u32;
110    }
111
112    unsafe { rtc_get_reset_reason(cpu_num) }
113}
114
115#[inline(always)]
116pub(crate) fn software_reset_cpu(cpu_num: u32) {
117    extern "C" {
118        fn software_reset_cpu(cpu_num: u32);
119    }
120
121    unsafe { software_reset_cpu(cpu_num) };
122}
123
124#[inline(always)]
125pub(crate) fn software_reset() -> ! {
126    extern "C" {
127        fn software_reset() -> !;
128    }
129
130    unsafe { software_reset() }
131}
132
133#[cfg(esp32s3)]
134#[inline(always)]
135pub(crate) fn ets_set_appcpu_boot_addr(boot_addr: u32) {
136    extern "C" {
137        fn ets_set_appcpu_boot_addr(boot_addr: u32);
138    }
139
140    unsafe { ets_set_appcpu_boot_addr(boot_addr) };
141}
esp_hal/rom/mod.rs

esp_hal/rom/
mod.rs
