esp_hal/soc/esp32c6/
peripherals.rs

1//! # Peripheral Instances
2//!
3//! This module creates singleton instances for each of the various peripherals,
4//! and re-exports them to allow users to access and use them in their
5//! applications.
6//!
7//! Should be noted that that the module also re-exports the [Interrupt] enum
8//! from the PAC, allowing users to handle interrupts associated with these
9//! peripherals.
10
11pub(crate) use esp32c6 as pac;
12// We need to export this for users to use
13#[doc(hidden)]
14pub use pac::Interrupt;
15
16// Note that certain are marked with `virtual` in the invocation of the
17// `peripherals!` macro below. Basically, this indicates there's no physical
18// peripheral (no `PSRAM`, `RADIO`, etc. peripheral in the PACs), so we're
19// creating "virtual peripherals" for them.
20crate::peripherals! {
21    peripherals: [
22        I2C0 <= I2C0,
23        SPI2 <= SPI2 (SPI2),
24        UART0 <= UART0,
25        UART1 <= UART1,
26    ],
27    unstable_peripherals: [
28        ADC1 <= virtual,
29        AES <= AES,
30        APB_SARADC <= APB_SARADC,
31        ASSIST_DEBUG <= ASSIST_DEBUG,
32        ATOMIC <= ATOMIC,
33        BT <= virtual,
34        DMA <= DMA,
35        DS <= DS,
36        ECC <= ECC,
37        EFUSE <= EFUSE,
38        EXTMEM <= EXTMEM,
39        GPIO <= GPIO,
40        GPIO_SD <= GPIO_SD,
41        HINF <= HINF,
42        HMAC <= HMAC,
43        HP_APM <= HP_APM,
44        HP_SYS <= HP_SYS,
45        I2C_ANA_MST <= I2C_ANA_MST,
46        I2S0 <= I2S0 (I2S0),
47        IEEE802154 <= IEEE802154,
48        INTERRUPT_CORE0 <= INTERRUPT_CORE0,
49        INTPRI <= INTPRI,
50        IO_MUX <= IO_MUX,
51        LEDC <= LEDC,
52        LPWR <= LP_CLKRST,
53        LP_CORE <= virtual,
54        LP_PERI <= LP_PERI,
55        LP_ANA <= LP_ANA,
56        LP_AON <= LP_AON,
57        LP_APM <= LP_APM,
58        LP_APM0 <= LP_APM0,
59        LP_I2C0 <= LP_I2C0,
60        LP_I2C_ANA_MST <= LP_I2C_ANA_MST,
61        LP_IO <= LP_IO,
62        LP_TEE <= LP_TEE,
63        LP_TIMER <= LP_TIMER,
64        LP_UART <= LP_UART,
65        LP_WDT <= LP_WDT,
66        MCPWM0 <= MCPWM0,
67        MEM_MONITOR <= MEM_MONITOR,
68        MODEM_LPCON <= MODEM_LPCON,
69        MODEM_SYSCON <= MODEM_SYSCON,
70        OTP_DEBUG <= OTP_DEBUG,
71        PARL_IO <= PARL_IO (PARL_IO),
72        PAU <= PAU,
73        PCR <= PCR,
74        PCNT <= PCNT,
75        PLIC_MX <= PLIC_MX,
76        PMU <= PMU,
77        RADIO_CLK <= virtual,
78        RMT <= RMT,
79        RNG <= RNG,
80        RSA <= RSA,
81        SHA <= SHA,
82        SLCHOST <= SLCHOST,
83        SOC_ETM <= SOC_ETM,
84        SPI0 <= SPI0,
85        SPI1 <= SPI1,
86        SYSTEM <= PCR,
87        SYSTIMER <= SYSTIMER,
88        SW_INTERRUPT <= virtual,
89        TEE <= TEE,
90        TIMG0 <= TIMG0,
91        TIMG1 <= TIMG1,
92        TRACE0 <= TRACE,
93        TSENS <= virtual,
94        TWAI0 <= TWAI0,
95        TWAI1 <= TWAI1,
96        UHCI0 <= UHCI0,
97        USB_DEVICE <= USB_DEVICE,
98        WIFI <= virtual,
99        MEM2MEM1 <= virtual,
100        MEM2MEM4 <= virtual,
101        MEM2MEM5 <= virtual,
102        MEM2MEM10 <= virtual,
103        MEM2MEM11 <= virtual,
104        MEM2MEM12 <= virtual,
105        MEM2MEM13 <= virtual,
106        MEM2MEM14 <= virtual,
107        MEM2MEM15 <= virtual,
108    ],
109    pins: [
110        (0, [Input, Output, Analog, RtcIo])
111        (1, [Input, Output, Analog, RtcIo])
112        (2, [Input, Output, Analog, RtcIo] (2 => FSPIQ) (2 => FSPIQ))
113        (3, [Input, Output, Analog, RtcIo])
114        (4, [Input, Output, Analog, RtcIo] (2 => FSPIHD) (0 => USB_JTAG_TMS 2 => FSPIHD))
115        (5, [Input, Output, Analog, RtcIo] (2 => FSPIWP) (0 => USB_JTAG_TDI 2 => FSPIWP))
116        (6, [Input, Output, Analog, RtcIo] (2 => FSPICLK) (0 => USB_JTAG_TCK 2 => FSPICLK_MUX))
117        (7, [Input, Output, Analog, RtcIo] (2 => FSPID) (0 => USB_JTAG_TDO 2 => FSPID))
118        (8, [Input, Output])
119        (9, [Input, Output])
120        (10, [Input, Output])
121        (11, [Input, Output])
122        (12, [Input, Output])
123        (13, [Input, Output])
124        (14, [Input, Output])
125        (15, [Input, Output])
126        (16, [Input, Output] (0 => U0RXD) (2 => FSPICS0))
127        (17, [Input, Output] () (0 => U0TXD 2 => FSPICS1))
128        (18, [Input, Output] () (2 => FSPICS2)) //  0 => SDIO_CMD but there are no signals since it's a fixed pin
129        (19, [Input, Output] () (2 => FSPICS3)) //  0 => SDIO_CLK but there are no signals since it's a fixed pin
130        (20, [Input, Output] () (2 => FSPICS4)) // 0 => SDIO_DATA0 but there are no signals since it's a fixed pin
131        (21, [Input, Output] () (2 => FSPICS5)) // 0 => SDIO_DATA1 but there are no signals since it's a fixed pin
132        (22, [Input, Output] () ()) // 0 => SDIO_DATA2 but there are no signals since it's a fixed pin
133        (23, [Input, Output] () ()) // 0 => SDIO_DATA3 but there are no signals since it's a fixed pin
134        (24, [Input, Output] () (0 => SPICS0))
135        (25, [Input, Output] (0 => SPIQ) (0 => SPIQ))
136        (26, [Input, Output] (0 => SPIWP) (0 => SPIWP))
137        (27, [Input, Output])
138        (28, [Input, Output] (0 => SPIHD) (0 => SPIHD))
139        (29, [Input, Output] () (0 => SPICLK_MUX))
140        (30, [Input, Output] (0 => SPID) (0 => SPID))
141    ],
142    dma_channels: [
143        DMA_CH0: DmaChannel0,
144        DMA_CH1: DmaChannel1,
145        DMA_CH2: DmaChannel2,
146    ]
147}
esp_hal/soc/esp32c6/peripherals.rs

esp_hal/soc/esp32c6/
peripherals.rs
