Module sleep

Available on crate feature unstable only.

RTC Control Sleep Module

Overview

The sleep module allows configuring various wakeup sources and setting up the sleep behavior based on those sources. The supported wakeup sources include:

• GPIO pins - light sleep only
• timers
• SDIO (Secure Digital Input/Output) - light sleep only
• MAC (Media Access Control) wake - light sleep only
• UART0 - light sleep only
• UART1 - light sleep only
• touch
• ULP (Ultra-Low Power) wake
• BT (Bluetooth) wake - light sleep only

Structs

• Ext0WakeupSource
  External wake-up source (Ext0).
• Ext1WakeupSource
  External wake-up source (Ext1).
• GpioWakeupSource
  GPIO wakeup source
• RtcSleepConfig
  Configuration for the RTC sleep behavior.
• RtcioWakeupSource
  RTC_IO wakeup source
• TimerWakeupSource
  Represents a timer wake-up source, triggering an event after a specified duration.
• Uart0WakeupSource
  UART0 wakeup source
• Uart1WakeupSource
  UART1 wakeup source
• WakeTriggers
  Represents the wakeup triggers.

Enums

• Error
  Errors that can occur when configuring RTC wake-up sources.
• WakeupLevel
  Level at which a wake-up event is triggered

Constants

• BT_POWERUP_CYCLES
  Bluetooth power-up cycles.
• BT_WAIT_CYCLES
  Bluetooth wait cycles.
• CPU_TOP_POWERUP_CYCLES
  CPU top power-up cycles.
• CPU_TOP_WAIT_CYCLES
  CPU top wait cycles.
• DG_PERI_POWERUP_CYCLES
  DG peripheral power-up cycles.
• DG_PERI_WAIT_CYCLES
  DG peripheral wait cycles.
• DG_WRAP_POWERUP_CYCLES
  DG wrap power-up cycles.
• DG_WRAP_WAIT_CYCLES
  DG wrap wait cycles.
• OTHER_BLOCKS_POWERUP
  Power-up setting for other blocks.
• OTHER_BLOCKS_WAIT
  Wait cycles for other blocks.
• RTC_CNTL_CK8M_WAIT_DEFAULT
  Default wait time for CK8M during startup.
• RTC_CNTL_DBG_ATTEN_DEEPSLEEP_ULTRA_LOW
  Deep sleep debug attenuation setting for ultra-low power mode.
• RTC_CNTL_DBG_ATTEN_MONITOR_DEFAULT
  Default monitor debug attenuation value.
• RTC_CNTL_DBIAS_0V90
  Digital bias setting for 0.90V.
• RTC_CNTL_DBIAS_0V95
  Digital bias setting for 0.95V.
• RTC_CNTL_DBIAS_1V00
  Digital bias setting for 1.00V.
• RTC_CNTL_DBIAS_1V05
  Digital bias setting for 1.05V.
• RTC_CNTL_DBIAS_1V10
  Digital bias setting for 1.10V.
• RTC_CNTL_DBIAS_1V15
  Digital bias setting for 1.15V.
• RTC_CNTL_DBIAS_1V20
  Digital bias setting for 1.20V.
• RTC_CNTL_DBIAS_1V25
  Digital bias setting for 1.25V.
• RTC_CNTL_DBIAS_1V30
  Digital bias setting for 1.30V. Voltage is approximately 1.34V in practice.
• RTC_CNTL_MIN_SLP_VAL_MIN
  Minimum sleep value.
• RTC_CNTL_PLL_BUF_WAIT_DEFAULT
  Default wait time for PLL buffer during startup.
• RTC_CNTL_ULPCP_TOUCH_START_WAIT_DEFAULT
  ULP co-processor touch start wait time default value.
• RTC_CNTL_ULPCP_TOUCH_START_WAIT_IN_SLEEP
  ULP co-processor touch start wait time during sleep, set to maximum.
• RTC_MEM_POWERUP_CYCLES
  RTC memory power-up cycles.
• RTC_MEM_WAIT_CYCLES
  RTC memory wait cycles.
• RTC_POWERUP_CYCLES
  RTC power-up cycles.
• RTC_WAIT_CYCLES
  RTC wait cycles.
• WIFI_POWERUP_CYCLES
  WiFi power-up cycles.
• WIFI_WAIT_CYCLES
  WiFi wait cycles.

Traits

• WakeSource
  Trait representing a wakeup source.