Module efuse

Available on crate feature unstable only.

Expand description

§Stability

This API is marked as unstable and is only available when the unstable crate feature is enabled. This comes with no stability guarantees, and could be changed or removed at any time.

§Reading of eFuses (ESP32)

§Overview

The efuse module provides functionality for reading eFuse data from the ESP32 chip, allowing access to various chip-specific information such as:

MAC address
Chip type, revision
Core count
Max CPU frequency

and more. It is useful for retrieving chip-specific configuration and identification data during runtime.

The Efuse struct represents the eFuse peripheral and is responsible for reading various eFuse fields and values.

§Examples

§Read data from the eFuse storage.


let mac_address = Efuse::read_base_mac_address();

println!(
    "MAC: {:#X}:{:#X}:{:#X}:{:#X}:{:#X}:{:#X}",
    mac_address[0],
    mac_address[1],
    mac_address[2],
    mac_address[3],
    mac_address[4],
    mac_address[5]
);

println!("MAC address {:02x?}", Efuse::mac_address());
println!("Flash Encryption {:?}", Efuse::flash_encryption());
println!("Core Count {}", Efuse::core_count());
println!("Bluetooth enabled {}", Efuse::is_bluetooth_enabled());
println!("Chip type {:?}", Efuse::chip_type());
println!("Max CPU clock {:?}", Efuse::max_cpu_frequency());

Structs§

Efuse: A struct representing the eFuse functionality of the chip.

Enums§

ChipType: Representing different types of ESP32 chips.

Constants§

ABS_DONE_0: Secure boot V1 is enabled for bootloader image
ABS_DONE_1: Secure boot V2 is enabled for bootloader image
ADC1_TP_HIGH: ADC1 Two Point calibration high point. Only valid if EFUSE_RD_BLK3_PART_RESERVE
ADC1_TP_LOW: ADC1 Two Point calibration low point. Only valid if EFUSE_RD_BLK3_PART_RESERVE
ADC2_TP_HIGH: ADC2 Two Point calibration high point. Only valid if EFUSE_RD_BLK3_PART_RESERVE
ADC2_TP_LOW: ADC2 Two Point calibration low point. Only valid if EFUSE_RD_BLK3_PART_RESERVE
ADC_VREF: True ADC reference voltage
BLK3_PART_RESERVE: BLOCK3 partially served for ADC calibration data
BLK3_RESERVED_2: read for BLOCK3
BLK3_RESERVED_6: read for BLOCK3
BLK3_RESERVED_7: read for BLOCK3
BLOCK1: Flash encryption key
BLOCK2: Security boot key
CHIP_CPU_FREQ_LOW: If set alongside EFUSE_RD_CHIP_CPU_FREQ_RATED; the ESP32’s max CPU frequency is rated for 160MHz. 240MHz otherwise
CHIP_CPU_FREQ_RATED: If set; the ESP32’s maximum CPU frequency has been rated
CHIP_PACKAGE: Chip package identifier
CHIP_PACKAGE_4BIT: Chip package identifier #4bit
CHIP_VER_REV1: bit is set to 1 for rev1 silicon
CHIP_VER_REV2
CLK8M_FREQ: 8MHz clock freq override
CODING_SCHEME: Efuse variable block length scheme
CONSOLE_DEBUG_DISABLE: Disable ROM BASIC interpreter fallback
CUSTOM_MAC: Custom MAC address
CUSTOM_MAC_CRC: CRC8 for custom MAC address
DISABLE_APP_CPU: Disables APP CPU
DISABLE_BT: Disables Bluetooth
DISABLE_DL_CACHE: Disable flash cache in UART bootloader
DISABLE_DL_DECRYPT: Disable flash decryption in UART bootloader
DISABLE_DL_ENCRYPT: Disable flash encryption in UART bootloader
DISABLE_SDIO_HOST
DIS_CACHE: Disables cache
FLASH_CRYPT_CNT: Flash encryption is enabled if this field has an odd number of bits set
FLASH_CRYPT_CONFIG: Flash encryption config (key tweak bits)
JTAG_DISABLE: Disable JTAG
KEY_STATUS: Usage of efuse block 3 (reserved)
MAC0: MAC address
MAC1: MAC address
MAC_CRC: CRC8 for MAC address
MAC_VERSION: Version of the MAC field
RD_DIS: Disable reading from BlOCK1-3
RESERVED_0_28: reserved
RESERVED_3_56: reserved
RESERVED_3_160: reserved
RESERVE_0_88: Reserved; it was created by set_missed_fields_in_regs func
RESERVE_0_112: Reserved; it was created by set_missed_fields_in_regs func
RESERVE_0_141: Reserved; it was created by set_missed_fields_in_regs func
RESERVE_0_145: Reserved; it was created by set_missed_fields_in_regs func
RESERVE_0_181: Reserved; it was created by set_missed_fields_in_regs func
RESERVE_0_186: Reserved; it was created by set_missed_fields_in_regs func
RESERVE_0_203: Reserved; it was created by set_missed_fields_in_regs func
SECURE_VERSION: Secure version for anti-rollback
SPI_PAD_CONFIG_CLK: Override SD_CLK pad (GPIO6/SPICLK)
SPI_PAD_CONFIG_CS0: Override SD_CMD pad (GPIO11/SPICS0)
SPI_PAD_CONFIG_D: Override SD_DATA_1 pad (GPIO8/SPID)
SPI_PAD_CONFIG_HD: read for SPI_pad_config_hd
SPI_PAD_CONFIG_Q: Override SD_DATA_0 pad (GPIO7/SPIQ)
UART_DOWNLOAD_DIS: Disable UART download mode. Valid for ESP32 V3 and newer; only
VOL_LEVEL_HP_INV: This field stores the voltage level for CPU to run at 240 MHz; or for flash/PSRAM to run at 80 MHz.0x0: level 7; 0x1: level 6; 0x2: level 5; 0x3: level 4. (RO)
WAFER_VERSION_MINOR
WR_DIS: Efuse write disable mask
XPD_SDIO_FORCE: Ignore MTDI pin (GPIO12) for VDD_SDIO on reset
XPD_SDIO_REG: read for XPD_SDIO_REG
XPD_SDIO_TIEH: If XPD_SDIO_FORCE & XPD_SDIO_REG

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