esp_hal/soc/esp32c2/
peripherals.rs

1//! # Peripheral Instances
2//!
3//! This module creates singleton instances for each of the various peripherals,
4//! and re-exports them to allow users to access and use them in their
5//! applications.
6//!
7//! Should be noted that that the module also re-exports the [Interrupt] enum
8//! from the PAC, allowing users to handle interrupts associated with these
9//! peripherals.
10
11pub(crate) use esp32c2 as pac;
12// We need to export this for users to use
13#[doc(hidden)]
14pub use pac::Interrupt;
15
16// Note that certain are marked with `virtual` in the invocation of the
17// `peripherals!` macro below. Basically, this indicates there's no physical
18// peripheral (no `PSRAM`, `RADIO`, etc. peripheral in the PACs), so we're
19// creating "virtual peripherals" for them.
20crate::peripherals! {
21    peripherals: [
22        I2C0 <= I2C0,
23        SPI2 <= SPI2 (SPI2),
24        UART0 <= UART0,
25        UART1 <= UART1,
26    ],
27    unstable_peripherals: [
28        ADC1 <= virtual,
29        APB_CTRL <= APB_CTRL,
30        APB_SARADC <= APB_SARADC,
31        ASSIST_DEBUG <= ASSIST_DEBUG,
32        BB <= BB,
33        BT <= virtual,
34        DMA <= DMA,
35        ECC <= ECC,
36        EFUSE <= EFUSE,
37        EXTMEM <= EXTMEM,
38        GPIO <= GPIO,
39        I2C_ANA_MST <= I2C_ANA_MST,
40        INTERRUPT_CORE0 <= INTERRUPT_CORE0,
41        IO_MUX <= IO_MUX,
42        LEDC <= LEDC,
43        LPWR <= RTC_CNTL,
44        MODEM_CLKRST <= MODEM_CLKRST,
45        RADIO_CLK <= virtual,
46        RNG <= RNG,
47        SENSITIVE <= SENSITIVE,
48        SHA <= SHA,
49        SPI0 <= SPI0,
50        SPI1 <= SPI1,
51        SYSTEM <= SYSTEM,
52        SYSTIMER <= SYSTIMER,
53        SW_INTERRUPT <= virtual,
54        TIMG0 <= TIMG0,
55        WIFI <= virtual,
56        XTS_AES <= XTS_AES,
57        MEM2MEM1 <= virtual,
58        MEM2MEM2 <= virtual,
59        MEM2MEM3 <= virtual,
60        MEM2MEM4 <= virtual,
61        MEM2MEM5 <= virtual,
62        MEM2MEM6 <= virtual,
63        MEM2MEM8 <= virtual,
64
65        DMA_CH0 <= virtual,
66    ],
67    pins: [
68        (0, [Input, Output, Analog, RtcIo])
69        (1, [Input, Output, Analog, RtcIo])
70        (2, [Input, Output, Analog, RtcIo] (2 => FSPIQ) (2 => FSPIQ))
71        (3, [Input, Output, Analog, RtcIo])
72        (4, [Input, Output, Analog, RtcIo] (2 => FSPIHD) (2 => FSPIHD))
73        (5, [Input, Output, Analog, RtcIo] (2 => FSPIWP) (2 => FSPIWP))
74        (6, [Input, Output] (2 => FSPICLK) (2 => FSPICLK_MUX))
75        (7, [Input, Output] (2 => FSPID) (2 => FSPID))
76        (8, [Input, Output])
77        (9, [Input, Output])
78        (10, [Input, Output] (2 => FSPICS0) (2 => FSPICS0))
79        (18, [Input, Output])
80        (19, [Input, Output])
81        (20, [Input, Output] (0 => U0RXD) ())
82    ]
83}