esp_hal/soc/esp32h2/efuse/
fields.rs

1//! This file was automatically generated, please do not edit it manually!
2//!
3//! Generated: 2025-04-22 11:33
4//! Version:   44563d2af4ebdba4db6c0a34a50c94f9
5
6#![allow(clippy::empty_docs)]
7
8use super::EfuseField;
9
10/// Disable programming of individual eFuses
11pub const WR_DIS: EfuseField = EfuseField::new(0, 0, 0, 32);
12/// Disable reading from BlOCK4-10
13pub const RD_DIS: EfuseField = EfuseField::new(0, 1, 32, 7);
14/// Reserved
15pub const RPT4_RESERVED0_4: EfuseField = EfuseField::new(0, 1, 39, 1);
16/// Represents whether icache is disabled or enabled. 1: disabled. 0: enabled
17pub const DIS_ICACHE: EfuseField = EfuseField::new(0, 1, 40, 1);
18/// Represents whether the function of usb switch to jtag is disabled or
19/// enabled. 1: disabled. 0: enabled
20pub const DIS_USB_JTAG: EfuseField = EfuseField::new(0, 1, 41, 1);
21/// Represents whether power glitch function is enabled. 1: enabled. 0: disabled
22pub const POWERGLITCH_EN: EfuseField = EfuseField::new(0, 1, 42, 1);
23/// Represents whether USB-Serial-JTAG is disabled or enabled. 1: disabled. 0:
24/// enabled
25pub const DIS_USB_SERIAL_JTAG: EfuseField = EfuseField::new(0, 1, 43, 1);
26/// Represents whether the function that forces chip into download mode is
27/// disabled or enabled. 1: disabled. 0: enabled
28pub const DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(0, 1, 44, 1);
29/// Represents whether SPI0 controller during boot_mode_download is disabled or
30/// enabled. 1: disabled. 0: enabled
31pub const SPI_DOWNLOAD_MSPI_DIS: EfuseField = EfuseField::new(0, 1, 45, 1);
32/// Represents whether TWAI function is disabled or enabled. 1: disabled. 0:
33/// enabled
34pub const DIS_TWAI: EfuseField = EfuseField::new(0, 1, 46, 1);
35/// Set this bit to enable selection between usb_to_jtag and pad_to_jtag through
36/// strapping gpio25 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are
37/// equal to 0
38pub const JTAG_SEL_ENABLE: EfuseField = EfuseField::new(0, 1, 47, 1);
39/// Represents whether JTAG is disabled in soft way. Odd number: disabled. Even
40/// number: enabled
41pub const SOFT_DIS_JTAG: EfuseField = EfuseField::new(0, 1, 48, 3);
42/// Represents whether JTAG is disabled in the hard way(permanently). 1:
43/// disabled. 0: enabled
44pub const DIS_PAD_JTAG: EfuseField = EfuseField::new(0, 1, 51, 1);
45/// Represents whether flash encrypt function is disabled or enabled(except in
46/// SPI boot mode). 1: disabled. 0: enabled
47pub const DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField = EfuseField::new(0, 1, 52, 1);
48/// Represents the single-end input threshold vrefh; 1.76 V to 2 V with step of
49/// 80 mV
50pub const USB_DREFH: EfuseField = EfuseField::new(0, 1, 53, 2);
51/// Represents the single-end input threshold vrefl; 1.76 V to 2 V with step of
52/// 80 mV
53pub const USB_DREFL: EfuseField = EfuseField::new(0, 1, 55, 2);
54/// Represents whether the D+ and D- pins is exchanged. 1: exchanged. 0: not
55/// exchanged
56pub const USB_EXCHG_PINS: EfuseField = EfuseField::new(0, 1, 57, 1);
57/// Represents whether vdd spi pin is functioned as gpio. 1: functioned. 0: not
58/// functioned
59pub const VDD_SPI_AS_GPIO: EfuseField = EfuseField::new(0, 1, 58, 1);
60/// Configures the curve of ECDSA calculation: 0: only enable P256. 1: only
61/// enable P192. 2: both enable P256 and P192. 3: only enable P256
62pub const ECDSA_CURVE_MODE: EfuseField = EfuseField::new(0, 1, 59, 2);
63/// Set this bit to permanently turn on ECC const-time mode
64pub const ECC_FORCE_CONST_TIME: EfuseField = EfuseField::new(0, 1, 61, 1);
65/// Set this bit to control the xts pseudo-round anti-dpa attack function: 0:
66/// controlled by register. 1-3: the higher the value is; the more pseudo-rounds
67/// are inserted to the xts-aes calculation
68pub const XTS_DPA_PSEUDO_LEVEL: EfuseField = EfuseField::new(0, 1, 62, 2);
69/// Reserved
70pub const RPT4_RESERVED1_1: EfuseField = EfuseField::new(0, 2, 64, 16);
71/// Represents whether RTC watchdog timeout threshold is selected at startup. 1:
72/// selected. 0: not selected
73pub const WDT_DELAY_SEL: EfuseField = EfuseField::new(0, 2, 80, 2);
74/// Enables flash encryption when 1 or 3 bits are set and disables otherwise
75pub const SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(0, 2, 82, 3);
76/// Revoke 1st secure boot key
77pub const SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(0, 2, 85, 1);
78/// Revoke 2nd secure boot key
79pub const SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(0, 2, 86, 1);
80/// Revoke 3rd secure boot key
81pub const SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(0, 2, 87, 1);
82/// Represents the purpose of Key0
83pub const KEY_PURPOSE_0: EfuseField = EfuseField::new(0, 2, 88, 4);
84/// Represents the purpose of Key1
85pub const KEY_PURPOSE_1: EfuseField = EfuseField::new(0, 2, 92, 4);
86/// Represents the purpose of Key2
87pub const KEY_PURPOSE_2: EfuseField = EfuseField::new(0, 3, 96, 4);
88/// Represents the purpose of Key3
89pub const KEY_PURPOSE_3: EfuseField = EfuseField::new(0, 3, 100, 4);
90/// Represents the purpose of Key4
91pub const KEY_PURPOSE_4: EfuseField = EfuseField::new(0, 3, 104, 4);
92/// Represents the purpose of Key5
93pub const KEY_PURPOSE_5: EfuseField = EfuseField::new(0, 3, 108, 4);
94/// Represents the spa secure level by configuring the clock random divide mode
95pub const SEC_DPA_LEVEL: EfuseField = EfuseField::new(0, 3, 112, 2);
96/// Reserved
97pub const RESERVE_0_114: EfuseField = EfuseField::new(0, 3, 114, 1);
98/// Represents whether anti-dpa attack is enabled. 1:enabled. 0: disabled
99pub const CRYPT_DPA_ENABLE: EfuseField = EfuseField::new(0, 3, 115, 1);
100/// Represents whether secure boot is enabled or disabled. 1: enabled. 0:
101/// disabled
102pub const SECURE_BOOT_EN: EfuseField = EfuseField::new(0, 3, 116, 1);
103/// Represents whether revoking aggressive secure boot is enabled or disabled.
104/// 1: enabled. 0: disabled
105pub const SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField = EfuseField::new(0, 3, 117, 1);
106/// Set these bits to enable power glitch function when chip power on
107pub const POWERGLITCH_EN1: EfuseField = EfuseField::new(0, 3, 118, 5);
108/// reserved
109pub const RESERVED_0_123: EfuseField = EfuseField::new(0, 3, 123, 1);
110/// Represents the flash waiting time after power-up; in unit of ms. When the
111/// value less than 15; the waiting time is the programmed value. Otherwise; the
112/// waiting time is 2 times the programmed value
113pub const FLASH_TPUW: EfuseField = EfuseField::new(0, 3, 124, 4);
114/// Represents whether Download mode is disabled or enabled. 1: disabled. 0:
115/// enabled
116pub const DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(0, 4, 128, 1);
117/// Represents whether direct boot mode is disabled or enabled. 1: disabled. 0:
118/// enabled
119pub const DIS_DIRECT_BOOT: EfuseField = EfuseField::new(0, 4, 129, 1);
120/// Set this bit to disable USB-Serial-JTAG print during rom boot
121pub const DIS_USB_SERIAL_JTAG_ROM_PRINT: EfuseField = EfuseField::new(0, 4, 130, 1);
122/// Reserved
123pub const RPT4_RESERVED3_5: EfuseField = EfuseField::new(0, 4, 131, 1);
124/// Represents whether the USB-Serial-JTAG download function is disabled or
125/// enabled. 1: disabled. 0: enabled
126pub const DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: EfuseField = EfuseField::new(0, 4, 132, 1);
127/// Represents whether security download is enabled or disabled. 1: enabled. 0:
128/// disabled
129pub const ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(0, 4, 133, 1);
130/// Set the default UARTboot message output mode
131pub const UART_PRINT_CONTROL: EfuseField = EfuseField::new(0, 4, 134, 2);
132/// Represents whether ROM code is forced to send a resume command during SPI
133/// boot. 1: forced. 0:not forced
134pub const FORCE_SEND_RESUME: EfuseField = EfuseField::new(0, 4, 136, 1);
135/// Represents the version used by ESP-IDF anti-rollback feature
136pub const SECURE_VERSION: EfuseField = EfuseField::new(0, 4, 137, 16);
137/// Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure
138/// Boot is enabled. 1: disabled. 0: enabled
139pub const SECURE_BOOT_DISABLE_FAST_WAKE: EfuseField = EfuseField::new(0, 4, 153, 1);
140/// Set bits to enable hysteresis function of PAD0~5
141pub const HYS_EN_PAD0: EfuseField = EfuseField::new(0, 4, 154, 6);
142/// Set bits to enable hysteresis function of PAD6~27
143pub const HYS_EN_PAD1: EfuseField = EfuseField::new(0, 5, 160, 22);
144/// Reserved
145pub const RPT4_RESERVED4_1: EfuseField = EfuseField::new(0, 5, 182, 2);
146/// Reserved
147pub const RPT4_RESERVED4_0: EfuseField = EfuseField::new(0, 5, 184, 8);
148/// MAC address
149pub const MAC0: EfuseField = EfuseField::new(1, 0, 0, 32);
150/// MAC address
151pub const MAC1: EfuseField = EfuseField::new(1, 1, 32, 16);
152/// Stores the extended bits of MAC address
153pub const MAC_EXT: EfuseField = EfuseField::new(1, 1, 48, 16);
154/// Stores RF Calibration data. RXIQ version
155pub const RXIQ_VERSION: EfuseField = EfuseField::new(1, 2, 64, 3);
156/// Stores RF Calibration data. RXIQ data 0
157pub const RXIQ_0: EfuseField = EfuseField::new(1, 2, 67, 7);
158/// Stores RF Calibration data. RXIQ data 1
159pub const RXIQ_1: EfuseField = EfuseField::new(1, 2, 74, 7);
160/// Stores the PMU active hp dbias
161pub const ACTIVE_HP_DBIAS: EfuseField = EfuseField::new(1, 2, 81, 5);
162/// Stores the PMU active lp dbias
163pub const ACTIVE_LP_DBIAS: EfuseField = EfuseField::new(1, 2, 86, 5);
164/// Stores the PMU sleep dbias
165pub const DSLP_DBIAS: EfuseField = EfuseField::new(1, 2, 91, 4);
166/// Stores the low 1 bit of dbias_vol_gap
167pub const DBIAS_VOL_GAP: EfuseField = EfuseField::new(1, 2, 95, 5);
168/// Reserved
169pub const MAC_RESERVED_2: EfuseField = EfuseField::new(1, 3, 100, 14);
170/// Stores the wafer version minor
171pub const WAFER_VERSION_MINOR: EfuseField = EfuseField::new(1, 3, 114, 3);
172/// Stores the wafer version major
173pub const WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(1, 3, 117, 2);
174/// Disables check of wafer version major
175pub const DISABLE_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(1, 3, 119, 1);
176/// Stores the flash cap
177pub const FLASH_CAP: EfuseField = EfuseField::new(1, 3, 120, 3);
178/// Stores the flash temp
179pub const FLASH_TEMP: EfuseField = EfuseField::new(1, 3, 123, 2);
180/// Stores the flash vendor
181pub const FLASH_VENDOR: EfuseField = EfuseField::new(1, 3, 125, 3);
182/// Package version
183pub const PKG_VERSION: EfuseField = EfuseField::new(1, 4, 128, 3);
184/// reserved
185pub const RESERVED_1_131: EfuseField = EfuseField::new(1, 4, 131, 29);
186/// Stores the second 32 bits of the zeroth part of system data
187pub const SYS_DATA_PART0_2: EfuseField = EfuseField::new(1, 5, 160, 32);
188/// Optional unique 128-bit ID
189pub const OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(2, 0, 0, 128);
190/// reserved
191pub const RESERVED_2_128: EfuseField = EfuseField::new(2, 4, 128, 2);
192/// BLK_VERSION_MINOR of BLOCK2. 1: RF Calibration data in BLOCK1
193pub const BLK_VERSION_MINOR: EfuseField = EfuseField::new(2, 4, 130, 3);
194/// BLK_VERSION_MAJOR of BLOCK2
195pub const BLK_VERSION_MAJOR: EfuseField = EfuseField::new(2, 4, 133, 2);
196/// Disables check of blk version major
197pub const DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(2, 4, 135, 1);
198/// Temperature calibration data
199pub const TEMP_CALIB: EfuseField = EfuseField::new(2, 4, 136, 9);
200/// ADC1 calibration data
201pub const ADC1_AVE_INITCODE_ATTEN0: EfuseField = EfuseField::new(2, 4, 145, 10);
202/// ADC1 calibration data
203pub const ADC1_AVE_INITCODE_ATTEN1: EfuseField = EfuseField::new(2, 4, 155, 10);
204/// ADC1 calibration data
205pub const ADC1_AVE_INITCODE_ATTEN2: EfuseField = EfuseField::new(2, 5, 165, 10);
206/// ADC1 calibration data
207pub const ADC1_AVE_INITCODE_ATTEN3: EfuseField = EfuseField::new(2, 5, 175, 10);
208/// ADC1 calibration data
209pub const ADC1_HI_DOUT_ATTEN0: EfuseField = EfuseField::new(2, 5, 185, 10);
210/// ADC1 calibration data
211pub const ADC1_HI_DOUT_ATTEN1: EfuseField = EfuseField::new(2, 6, 195, 10);
212/// ADC1 calibration data
213pub const ADC1_HI_DOUT_ATTEN2: EfuseField = EfuseField::new(2, 6, 205, 10);
214/// ADC1 calibration data
215pub const ADC1_HI_DOUT_ATTEN3: EfuseField = EfuseField::new(2, 6, 215, 10);
216/// ADC1 calibration data
217pub const ADC1_CH0_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(2, 7, 225, 4);
218/// ADC1 calibration data
219pub const ADC1_CH1_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(2, 7, 229, 4);
220/// ADC1 calibration data
221pub const ADC1_CH2_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(2, 7, 233, 4);
222/// ADC1 calibration data
223pub const ADC1_CH3_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(2, 7, 237, 4);
224/// ADC1 calibration data
225pub const ADC1_CH4_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(2, 7, 241, 4);
226/// reserved
227pub const RESERVED_2_245: EfuseField = EfuseField::new(2, 7, 245, 11);
228/// User data
229pub const BLOCK_USR_DATA: EfuseField = EfuseField::new(3, 0, 0, 192);
230/// reserved
231pub const RESERVED_3_192: EfuseField = EfuseField::new(3, 6, 192, 8);
232/// Custom MAC
233pub const CUSTOM_MAC: EfuseField = EfuseField::new(3, 6, 200, 48);
234/// reserved
235pub const RESERVED_3_248: EfuseField = EfuseField::new(3, 7, 248, 8);
236/// Key0 or user data
237pub const BLOCK_KEY0: EfuseField = EfuseField::new(4, 0, 0, 256);
238/// Key1 or user data
239pub const BLOCK_KEY1: EfuseField = EfuseField::new(5, 0, 0, 256);
240/// Key2 or user data
241pub const BLOCK_KEY2: EfuseField = EfuseField::new(6, 0, 0, 256);
242/// Key3 or user data
243pub const BLOCK_KEY3: EfuseField = EfuseField::new(7, 0, 0, 256);
244/// Key4 or user data
245pub const BLOCK_KEY4: EfuseField = EfuseField::new(8, 0, 0, 256);
246/// Key5 or user data
247pub const BLOCK_KEY5: EfuseField = EfuseField::new(9, 0, 0, 256);
248/// System data part 2 (reserved)
249pub const BLOCK_SYS_DATA2: EfuseField = EfuseField::new(10, 0, 0, 256);
esp_hal/soc/esp32h2/efuse/fields.rs

esp_hal/soc/esp32h2/efuse/
fields.rs
