Module cam

Available on crate feature unstable only.

Camera - Master or Slave Mode

Overview

The camera module is designed to receive parallel video data signals, and its bus supports DVP 8-/16-bit modes in master or slave mode.

Configuration

In master mode, the peripheral provides the master clock to drive the camera, in slave mode it does not. This is configured with the with_master_clock method on the camera driver. The driver (due to the peripheral) mandates DMA (Direct Memory Access) for efficient data transfer.

Examples

Master Mode

Following code shows how to receive some bytes from an 8 bit DVP stream in master mode.

let mclk_pin = peripherals.GPIO15;
let vsync_pin = peripherals.GPIO6;
let href_pin = peripherals.GPIO7;
let pclk_pin = peripherals.GPIO13;

let config = Config::default().with_frequency(Rate::from_mhz(20));

let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
let mut camera = Camera::new(
    lcd_cam.cam,
    peripherals.DMA_CH0,
    config,
)?
.with_master_clock(mclk_pin) // Remove this for slave mode
.with_pixel_clock(pclk_pin)
.with_vsync(vsync_pin)
.with_h_enable(href_pin)
.with_data0(peripherals.GPIO11)
.with_data1(peripherals.GPIO9)
.with_data2(peripherals.GPIO8)
.with_data3(peripherals.GPIO10)
.with_data4(peripherals.GPIO12)
.with_data5(peripherals.GPIO18)
.with_data6(peripherals.GPIO17)
.with_data7(peripherals.GPIO16);

let transfer = camera.receive(dma_buf).map_err(|e| e.0)?;

Structs

Cam

Represents the camera interface.

Camera

Represents the camera interface with DMA support.

CameraTransfer

Represents an ongoing (or potentially stopped) transfer from the Camera to a DMA buffer.

Config

Configuration settings for the Camera interface.

Enums

ConfigError

Vsync Filter Threshold

EofMode

Generation of GDMA SUC EOF

VhdeMode

Vsync/Hsync or Data Enable Mode

VsyncFilterThreshold

Vsync Filter Threshold