esp_hal/clock/clocks_ll/
esp32s3.rs

1use crate::{
2    clock::{Clock, CpuClock},
3    peripherals::{APB_CTRL, SYSTEM},
4    rom,
5};
6
7pub(crate) fn set_cpu_clock(cpu_clock_speed: CpuClock) {
8    SYSTEM::regs()
9        .sysclk_conf()
10        .modify(|_, w| unsafe { w.soc_clk_sel().bits(1) });
11    SYSTEM::regs().cpu_per_conf().modify(|_, w| unsafe {
12        w.pll_freq_sel().set_bit();
13        w.cpuperiod_sel().bits(match cpu_clock_speed {
14            CpuClock::_80MHz => 0,
15            CpuClock::_160MHz => 1,
16            CpuClock::_240MHz => 2,
17        })
18    });
19
20    rom::ets_update_cpu_frequency_rom(cpu_clock_speed.frequency().as_mhz());
21}
22
23// Note: this comment has been copied from esp-idf, including the mistake.
24// Mask for clock bits used by both WIFI and Bluetooth, 0, 1, 2, 3, 7,
25// 8, 9, 10, 19, 20, 21, 22, 23
26const SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M: u32 = 0x78078F;
27
28// SYSTEM_WIFI_CLK_EN : R/W ;bitpos:[31:0] ;default: 32'hfffce030
29const SYSTEM_WIFI_CLK_EN: u32 = 0x00FB9FCF;
30
31pub(super) fn enable_phy(enable: bool) {
32    // `periph_ll_wifi_bt_module_enable_clk_clear_rst`
33    // `periph_ll_wifi_bt_module_disable_clk_set_rst`
34    APB_CTRL::regs().wifi_clk_en().modify(|r, w| unsafe {
35        if enable {
36            w.bits(r.bits() | SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M)
37        } else {
38            w.bits(r.bits() & !SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M)
39        }
40    });
41}
42
43pub(super) fn enable_bt(_: bool) {
44    // `periph_ll_wifi_module_enable_clk_clear_rst`. does nothing
45    // `periph_ll_wifi_module_disable_clk_set_rst`. does nothing
46}
47
48pub(super) fn enable_wifi(_: bool) {
49    // `periph_ll_wifi_module_enable_clk_clear_rst`. does nothing
50    // `periph_ll_wifi_module_disable_clk_set_rst`. does nothing
51}
52
53pub(super) fn reset_mac() {
54    APB_CTRL::regs()
55        .wifi_rst_en()
56        .modify(|_, w| w.mac_rst().set_bit());
57    APB_CTRL::regs()
58        .wifi_rst_en()
59        .modify(|_, w| w.mac_rst().clear_bit());
60}
61
62pub(super) fn init_clocks() {
63    const SYSTEM_WIFI_CLK_I2C_CLK_EN: u32 = 1 << 5;
64    const SYSTEM_WIFI_CLK_UNUSED_BIT12: u32 = 1 << 12;
65    const SYSTEM_WIFI_CLK_SDIO_HOST_EN: u32 = 1 << 13;
66
67    const WIFI_BT_SDIO_CLK: u32 =
68        SYSTEM_WIFI_CLK_I2C_CLK_EN | SYSTEM_WIFI_CLK_UNUSED_BIT12 | SYSTEM_WIFI_CLK_SDIO_HOST_EN;
69
70    APB_CTRL::regs()
71        .wifi_clk_en()
72        .modify(|r, w| unsafe { w.bits(r.bits() & !WIFI_BT_SDIO_CLK | SYSTEM_WIFI_CLK_EN) });
73}
74
75pub(super) fn ble_rtc_clk_init() {
76    // nothing for this target
77}
78
79pub(super) fn reset_rpa() {
80    // nothing for this target
81}
esp_hal/clock/clocks_ll/esp32s3.rs

esp_hal/clock/clocks_ll/
esp32s3.rs
