esp_hal/rom/
mod.rs

1//! # ESP ROM libraries
2//!
3//! ## Overview
4//! The `rom` driver provides functionality related to the ROM (Read-Only
5//! Memory) on ESP chips. It includes implementations for the [CRC (Cyclic
6//! Redundancy Check)] and [MD5 (Message Digest 5)] algorithms.
7//!
8//! The driver's functionality allows users to perform CRC calculations and MD5
9//! hashing using the ROM functions provided by the ESP chip. This can be useful
10//! for various applications that require data integrity checks or cryptographic
11//! operations.
12//!
13//! It uses `CRC` error-checking techniques to detect changes in data during
14//! transmission or storage.
15//!
16//! This module also implements the `MD5` algorithm, which is widely used for
17//! cryptographic hash function. It's commonly used to verify data integrity and
18//! to check whether the data has been modified.
19//!
20//! Safe abstractions to the additional libraries provided in the ESP's
21//! Read-Only Memory.
22//!
23//! [CRC (Cyclic Redundancy Check)]: ./crc/index.html
24//! [MD5 (Message Digest 5)]: ./md5/index.html
25
26#![allow(unused_macros)]
27
28#[cfg(any(rom_crc_be, rom_crc_le))]
29pub mod crc;
30#[cfg(any(rom_md5_bsd, rom_md5_mbedtls))]
31pub mod md5;
32pub(crate) mod regi2c;
33
34#[inline(always)]
35pub(crate) fn ets_delay_us(us: u32) {
36    unsafe extern "C" {
37        fn ets_delay_us(us: u32);
38    }
39
40    unsafe { ets_delay_us(us) };
41}
42
43#[allow(unused)]
44#[inline(always)]
45pub(crate) fn ets_update_cpu_frequency_rom(ticks_per_us: u32) {
46    unsafe extern "C" {
47        fn ets_update_cpu_frequency(ticks_per_us: u32);
48    }
49
50    unsafe { ets_update_cpu_frequency(ticks_per_us) };
51}
52
53#[inline(always)]
54pub(crate) fn rtc_get_reset_reason(cpu_num: u32) -> u32 {
55    unsafe extern "C" {
56        fn rtc_get_reset_reason(cpu_num: u32) -> u32;
57    }
58
59    unsafe { rtc_get_reset_reason(cpu_num) }
60}
61
62#[inline(always)]
63pub(crate) fn software_reset_cpu(cpu_num: u32) {
64    unsafe extern "C" {
65        fn software_reset_cpu(cpu_num: u32);
66    }
67
68    unsafe { software_reset_cpu(cpu_num) };
69}
70
71#[inline(always)]
72pub(crate) fn software_reset() -> ! {
73    unsafe extern "C" {
74        fn software_reset() -> !;
75    }
76
77    unsafe { software_reset() }
78}
79
80#[cfg(esp32s3)]
81#[inline(always)]
82pub(crate) fn ets_set_appcpu_boot_addr(boot_addr: u32) {
83    unsafe extern "C" {
84        fn ets_set_appcpu_boot_addr(boot_addr: u32);
85    }
86
87    unsafe { ets_set_appcpu_boot_addr(boot_addr) };
88}
esp_hal/rom/mod.rs

esp_hal/rom/
mod.rs
