esp_hal/aes/
esp32.rs

1use crate::aes::{ALIGN_SIZE, Aes, Aes128, Aes192, Aes256, AesFlavour, Endianness, Mode};
2
3impl Aes<'_> {
4    pub(super) fn init(&mut self) {
5        self.write_endianness(
6            Endianness::BigEndian,
7            Endianness::BigEndian,
8            Endianness::BigEndian,
9            Endianness::BigEndian,
10            Endianness::BigEndian,
11            Endianness::BigEndian,
12        );
13    }
14
15    pub(super) fn write_key(&mut self, key: &[u8]) {
16        let key_len = self.regs().key_iter().count();
17        debug_assert!(key.len() <= key_len * ALIGN_SIZE);
18        debug_assert_eq!(key.len() % ALIGN_SIZE, 0);
19        self.alignment_helper
20            .volatile_write_regset(self.regs().key(0).as_ptr(), key, key_len);
21    }
22
23    pub(super) fn write_block(&mut self, block: &[u8]) {
24        let text_len = self.regs().text_iter().count();
25        debug_assert_eq!(block.len(), text_len * ALIGN_SIZE);
26        self.alignment_helper
27            .volatile_write_regset(self.regs().text(0).as_ptr(), block, text_len);
28    }
29
30    pub(super) fn write_mode(&self, mode: Mode) {
31        self.regs().mode().write(|w| unsafe { w.bits(mode as _) });
32    }
33
34    /// Configures how the state matrix would be laid out
35    pub fn write_endianness(
36        &mut self,
37        input_text_word_endianess: Endianness,
38        input_text_byte_endianess: Endianness,
39        output_text_word_endianess: Endianness,
40        output_text_byte_endianess: Endianness,
41        key_word_endianess: Endianness,
42        key_byte_endianess: Endianness,
43    ) {
44        let mut to_write = 0_u32;
45        to_write |= key_byte_endianess as u32;
46        to_write |= (key_word_endianess as u32) << 1;
47        to_write |= (input_text_byte_endianess as u32) << 2;
48        to_write |= (input_text_word_endianess as u32) << 3;
49        to_write |= (output_text_byte_endianess as u32) << 4;
50        to_write |= (output_text_word_endianess as u32) << 5;
51        self.regs().endian().write(|w| unsafe { w.bits(to_write) });
52    }
53
54    pub(super) fn write_start(&self) {
55        self.regs().start().write(|w| w.start().set_bit());
56    }
57
58    pub(super) fn read_idle(&mut self) -> bool {
59        self.regs().idle().read().idle().bit_is_set()
60    }
61
62    pub(super) fn read_block(&self, block: &mut [u8]) {
63        let text_len = self.regs().text_iter().count();
64        debug_assert_eq!(block.len(), text_len * ALIGN_SIZE);
65        self.alignment_helper
66            .volatile_read_regset(self.regs().text(0).as_ptr(), block, text_len);
67    }
68}
69
70impl AesFlavour for Aes128 {
71    type KeyType<'b> = &'b [u8; 16];
72}
73
74impl AesFlavour for Aes192 {
75    type KeyType<'b> = &'b [u8; 24];
76}
77
78impl AesFlavour for Aes256 {
79    type KeyType<'b> = &'b [u8; 32];
80}
esp_hal/aes/esp32.rs

esp_hal/aes/
esp32.rs
