Expand description
§CPU Clock Control
§Overview
Clocks are mainly sourced from oscillator (OSC), RC, and PLL circuits, and then processed by the dividers or selectors, which allows most functional modules to select their working clock according to their power consumption and performance requirements.
The clock subsystem is used to source and distribute system/module clocks from a range of root clocks. The clock tree driver maintains the basic functionality of the system clock and the intricate relationship among module clocks.
§Configuration
During HAL initialization, specify a CPU clock speed to configure the desired clock frequencies.
The CPU clock
is responsible for defining the speed at which the central
processing unit (CPU) operates. This driver provides predefined options for
different CPU clock speeds, such as
- 80MHz
- 160MHz
§Frozen Clock Frequencies
Once the clock configuration is applied, the clock frequencies become
frozen
and cannot be changed.
§Examples
§Initialize With Different Clock Frequencies
use esp_hal::clock::CpuClock;
// Initialize with the highest possible frequency for this chip
let config = esp_hal::Config::default().with_cpu_clock(CpuClock::max());
let peripherals = esp_hal::init(config);
Structs§
- PhyClock
Guard unstable
- Prevents the PHY clock from being disabled.
Enums§
Traits§
- Modem
Clock Controller unstable
- This trait provides common functionality for all
Functions§
- init_
radio_ clocks unstable
- Do any common initial initialization needed for the radio clocks