Module efuse

Available on crate feature unstable only.

Expand description

§Stability

This API is marked as unstable and is only available when the unstable crate feature is enabled. This comes with no stability guarantees, and could be changed or removed at any time.

§Reading of eFuses (ESP32-S2)

§Overview

The efuse module provides functionality for reading eFuse data from the ESP32-S2 chip, allowing access to various chip-specific information such as:

MAC address
core count
CPU frequency
chip type

and more. It is useful for retrieving chip-specific configuration and identification data during runtime.

The Efuse struct represents the eFuse peripheral and is responsible for reading various eFuse fields and values.

§Examples

§Read data from the eFuse storage.


let mac_address = Efuse::read_base_mac_address();

println!(
    "MAC: {:#X}:{:#X}:{:#X}:{:#X}:{:#X}:{:#X}",
    mac_address[0],
    mac_address[1],
    mac_address[2],
    mac_address[3],
    mac_address[4],
    mac_address[5]
);

println!("MAC address {:02x?}", Efuse::mac_address());
println!("Flash Encryption {:?}", Efuse::flash_encryption());

Structs§

Efuse: A struct representing the eFuse functionality of the chip.

Constants§

ADC_CALIB: 4 bit of ADC calibration
BLK_VERSION_MAJOR: BLK_VERSION_MAJOR
BLK_VERSION_MINOR: BLK_VERSION_MINOR of BLOCK2
BLOCK0_VERSION: BLOCK0 efuse version
BLOCK_KEY0: Key0 or user data
BLOCK_KEY1: Key1 or user data
BLOCK_KEY2: Key2 or user data
BLOCK_KEY3: Key3 or user data
BLOCK_KEY4: Key4 or user data
BLOCK_KEY5: Key5 or user data
BLOCK_SYS_DATA2: System data part 2 (reserved)
BLOCK_USR_DATA: User data
CUSTOM_MAC: Custom MAC
DISABLE_BLK_VERSION_MAJOR: Disables check of blk version major
DISABLE_WAFER_VERSION_MAJOR: Disables check of wafer version major
DIS_BOOT_REMAP: Disables capability to Remap RAM to ROM address space
DIS_DCACHE: Set this bit to disable Dcache
DIS_DOWNLOAD_DCACHE: Disables Dcache when SoC is in Download mode
DIS_DOWNLOAD_ICACHE: Disables Icache when SoC is in Download mode
DIS_DOWNLOAD_MANUAL_ENCRYPT: Disables flash encryption when in download boot modes
DIS_DOWNLOAD_MODE: Set this bit to disable all download boot modes
DIS_FORCE_DOWNLOAD: Set this bit to disable the function that forces chip into download mode
DIS_ICACHE: Set this bit to disable Icache
DIS_LEGACY_SPI_BOOT: Set this bit to disable Legacy SPI boot mode
DIS_RTC_RAM_BOOT: Reserved
DIS_TWAI: Set this bit to disable the TWAI Controller function
DIS_USB: Set this bit to disable USB OTG function
DIS_USB_DOWNLOAD_MODE: Set this bit to disable use of USB OTG in UART download boot mode
ENABLE_SECURITY_DOWNLOAD: Set this bit to enable secure UART download mode (read/write flash only)
FLASH_TPUW: Configures flash startup delay after SoC power-up; in unit of (ms/2). When the value is 15; delay is 7.5 ms
FLASH_TYPE: SPI flash type
FLASH_VERSION: Flash version
FORCE_SEND_RESUME: If set; forces ROM code to send an SPI flash resume command during SPI boot
HARD_DIS_JTAG: Hardware disables JTAG permanently
KEY_PURPOSE_0: Purpose of KEY0
KEY_PURPOSE_1: Purpose of KEY1
KEY_PURPOSE_2: Purpose of KEY2
KEY_PURPOSE_3: Purpose of KEY3
KEY_PURPOSE_4: Purpose of KEY4
KEY_PURPOSE_5: Purpose of KEY5
KEY_PURPOSE_6: Purpose of KEY6
MAC0: MAC address
MAC1: MAC address
OPTIONAL_UNIQUE_ID: Optional unique 128-bit ID
PIN_POWER_SELECTION: Set default power supply for GPIO33-GPIO37; set when SPI flash is initialized
PKG_VERSION: Package version
PSRAM_VERSION: PSRAM version
RD_DIS: Disable reading from BlOCK4-10
RESERVED_0_162: reserved
RESERVED_1_123: reserved
RESERVED_1_135: reserved
RESERVED_3_192: reserved
RESERVED_3_248: reserved
RPT4_RESERVED1: Reserved (used for four backups method)
RPT4_RESERVED2: Reserved (used for four backups method)
RPT4_RESERVED3: Reserved (used for four backups method)
RPT4_RESERVED5: Reserved (used for four backups method)
RTCCALIB_V1IDX_A10H
RTCCALIB_V1IDX_A10L
RTCCALIB_V1IDX_A11H
RTCCALIB_V1IDX_A11L
RTCCALIB_V1IDX_A12H
RTCCALIB_V1IDX_A12L
RTCCALIB_V1IDX_A13H
RTCCALIB_V1IDX_A13L
RTCCALIB_V1IDX_A20H
RTCCALIB_V1IDX_A20L
RTCCALIB_V1IDX_A21H
RTCCALIB_V1IDX_A21L
RTCCALIB_V1IDX_A22H
RTCCALIB_V1IDX_A22L
RTCCALIB_V1IDX_A23H
RTCCALIB_V1IDX_A23L
SECURE_BOOT_AGGRESSIVE_REVOKE: Set this bit to enable aggressive secure boot key revocation mode
SECURE_BOOT_EN: Set this bit to enable secure boot
SECURE_BOOT_KEY_REVOKE0: Revoke 1st secure boot key
SECURE_BOOT_KEY_REVOKE1: Revoke 2nd secure boot key
SECURE_BOOT_KEY_REVOKE2: Revoke 3rd secure boot key
SECURE_VERSION: Secure version (used by ESP-IDF anti-rollback feature)
SOFT_DIS_JTAG: Software disables JTAG. When software disabled; JTAG can be activated temporarily by HMAC peripheral
SPI_BOOT_CRYPT_CNT: Enables flash encryption when 1 or 3 bits are set and disabled otherwise
SPI_PAD_CONFIG_CLK: SPI_PAD_configure CLK
SPI_PAD_CONFIG_CS: SPI_PAD_configure CS
SPI_PAD_CONFIG_D: SPI_PAD_configure D(D0)
SPI_PAD_CONFIG_D4: SPI_PAD_configure D4
SPI_PAD_CONFIG_D5: SPI_PAD_configure D5
SPI_PAD_CONFIG_D6: SPI_PAD_configure D6
SPI_PAD_CONFIG_D7: SPI_PAD_configure D7
SPI_PAD_CONFIG_DQS: SPI_PAD_configure DQS
SPI_PAD_CONFIG_HD: SPI_PAD_configure HD(D3)
SPI_PAD_CONFIG_Q: SPI_PAD_configure Q(D1)
SPI_PAD_CONFIG_WP: SPI_PAD_configure WP(D2)
SYS_DATA_PART0_2: Stores the second part of the zeroth part of system data
TEMP_CALIB: Temperature calibration data
UART_PRINT_CHANNEL: Selects the default UART for printing boot messages
UART_PRINT_CONTROL: Set the default UART boot message output mode
USB_DREFH: Controls single-end input threshold vrefh; 1.76 V to 2 V with step of 80 mV; stored in eFuse
USB_DREFL: Controls single-end input threshold vrefl; 0.8 V to 1.04 V with step of 80 mV; stored in eFuse
USB_EXCHG_PINS: Set this bit to exchange USB D+ and D- pins
USB_EXT_PHY_ENABLE: Set this bit to enable external USB PHY
USB_FORCE_NOPERSIST: If set; forces USB BVALID to 1
VDD_SPI_DCAP: Prevents SPI regulator from overshoot
VDD_SPI_DCURLIM: Tunes the current limit threshold of SPI regulator when tieh=0; about 800 mA/(8+d)
VDD_SPI_DREFH: SPI regulator high voltage reference
VDD_SPI_DREFL: SPI regulator low voltage reference
VDD_SPI_DREFM: SPI regulator medium voltage reference
VDD_SPI_ENCURLIM: Set SPI regulator to 1 to enable output current limit
VDD_SPI_EN_INIT: Set SPI regulator to 0 to configure init[1:0]=0
VDD_SPI_FORCE: Set this bit to use XPD_VDD_PSI_REG and VDD_SPI_TIEH to configure VDD_SPI LDO
VDD_SPI_INIT: Adds resistor from LDO output to ground
VDD_SPI_MODECURLIM: SPI regulator switches current limit mode
VDD_SPI_TIEH: If VDD_SPI_FORCE is 1; determines VDD_SPI voltage
VDD_SPI_XPD: If VDD_SPI_FORCE is 1; this value determines if the VDD_SPI regulator is powered on
WAFER_VERSION_MAJOR: WAFER_VERSION_MAJOR
WAFER_VERSION_MINOR_HI: WAFER_VERSION_MINOR most significant bit
WAFER_VERSION_MINOR_LO: WAFER_VERSION_MINOR least significant bits
WDT_DELAY_SEL: RTC watchdog timeout threshold; in unit of slow clock cycle
WR_DIS: Disable programming of individual eFuses

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