esp_hal/spi/
mod.rs

1//! Serial Peripheral Interface (SPI)
2//!
3//! ## Overview
4//! The Serial Peripheral Interface (SPI) is a synchronous serial interface
5//! useful for communication with external peripherals.
6//!
7//! ## Configuration
8//! This peripheral is capable of operating in either master or slave mode. For
9//! more information on these modes, please refer to the documentation in their
10//! respective modules.
11
12#[cfg(any(spi_master_supports_dma, spi_slave_supports_dma))]
13use crate::dma::DmaError;
14
15#[cfg(spi_master_driver_supported)]
16pub mod master;
17
18crate::unstable_module! {
19    #[cfg(spi_slave_driver_supported)]
20    pub mod slave;
21}
22
23/// SPI errors
24#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
25#[cfg_attr(feature = "defmt", derive(defmt::Format))]
26#[non_exhaustive]
27pub enum Error {
28    /// Error occurred due to a DMA-related issue.
29    #[cfg(feature = "unstable")]
30    #[cfg_attr(docsrs, doc(cfg(feature = "unstable")))]
31    #[allow(clippy::enum_variant_names, reason = "DMA is unstable")]
32    #[cfg(any(spi_master_supports_dma, spi_slave_supports_dma))]
33    DmaError(DmaError),
34    /// Error indicating that the maximum DMA transfer size was exceeded.
35    MaxDmaTransferSizeExceeded,
36    /// Error indicating that the FIFO size was exceeded during SPI
37    /// communication.
38    FifoSizeExeeded,
39    /// Error indicating that the operation is unsupported by the current
40    /// implementation or for the given arguments.
41    Unsupported,
42    /// An unknown error occurred during SPI communication.
43    Unknown,
44}
45
46#[doc(hidden)]
47#[cfg(feature = "unstable")]
48#[cfg(any(spi_master_supports_dma, spi_slave_supports_dma))]
49impl From<DmaError> for Error {
50    fn from(value: DmaError) -> Self {
51        Error::DmaError(value)
52    }
53}
54
55#[doc(hidden)]
56#[cfg(not(feature = "unstable"))]
57#[cfg(any(spi_master_supports_dma, spi_slave_supports_dma))]
58impl From<DmaError> for Error {
59    fn from(_value: DmaError) -> Self {
60        Error::Unknown
61    }
62}
63
64impl embedded_hal::spi::Error for Error {
65    fn kind(&self) -> embedded_hal::spi::ErrorKind {
66        embedded_hal::spi::ErrorKind::Other
67    }
68}
69
70/// SPI communication modes, defined by clock polarity (CPOL) and clock phase
71/// (CPHA).
72///
73/// These modes control the clock signal's idle state and when data is sampled
74/// and shifted.
75#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
76#[cfg_attr(feature = "defmt", derive(defmt::Format))]
77pub enum Mode {
78    /// Mode 0 (CPOL = 0, CPHA = 0): Clock is low when idle, data is captured on
79    /// the rising edge and propagated on the falling edge.
80    _0,
81    /// Mode 1 (CPOL = 0, CPHA = 1): Clock is low when idle, data is captured on
82    /// the falling edge and propagated on the rising edge.
83    _1,
84    /// Mode 2 (CPOL = 1, CPHA = 0): Clock is high when idle, data is captured
85    /// on the falling edge and propagated on the rising edge.
86    _2,
87    /// Mode 3 (CPOL = 1, CPHA = 1): Clock is high when idle, data is captured
88    /// on the rising edge and propagated on the falling edge.
89    _3,
90}
91
92/// SPI Bit Order
93#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
94#[cfg_attr(feature = "defmt", derive(defmt::Format))]
95pub enum BitOrder {
96    /// Most Significant Bit (MSB) is transmitted first.
97    MsbFirst,
98    /// Least Significant Bit (LSB) is transmitted first.
99    LsbFirst,
100}
esp_hal/spi/mod.rs

esp_hal/spi/
mod.rs
