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Module efuse

Module efuse 

Source
Expand description

§eFuse (one-time programmable configuration)

§Overview

The efuse module provides functionality for reading eFuse data from the chip, allowing access to various chip-specific information such as:

  • MAC address
  • Chip revision

and more. It is useful for retrieving chip-specific configuration and identification data during runtime.

§Examples

§Reading interface MAC addresses

use esp_hal::efuse::{self, InterfaceMacAddress};

let mac = efuse::interface_mac_address(InterfaceMacAddress::Station);
println!("MAC: {mac}");
println!("MAC bytes: {:02x?}", mac.as_bytes());

Structs§

ChipRevision
Represents the hardware revision.
EfuseFieldunstable
The bit field for get access to efuse data
MacAddress
Hardware (MAC) address.

Enums§

AdcCalibUnitunstable
Selects which ADC we are interested in the efuse calibration data for
InterfaceMacAddress
Interface selection for interface_mac_address.
SetMacErrorunstable
Error indicating issues with setting the MAC address.

Constants§

ADC1_CAL_VOL_ATTEN0unstable
ADC1 calibration voltage at atten0
ADC1_CAL_VOL_ATTEN1unstable
ADC1 calibration voltage at atten1
ADC1_CAL_VOL_ATTEN2unstable
ADC1 calibration voltage at atten2
ADC1_CAL_VOL_ATTEN3unstable
ADC1 calibration voltage at atten3
ADC1_INIT_CODE_ATTEN0unstable
ADC1 init code at atten0
ADC1_INIT_CODE_ATTEN1unstable
ADC1 init code at atten1
ADC1_INIT_CODE_ATTEN2unstable
ADC1 init code at atten2
ADC1_INIT_CODE_ATTEN3unstable
ADC1 init code at atten3
ADC2_CAL_VOL_ATTEN0unstable
ADC2 calibration voltage at atten0
ADC2_CAL_VOL_ATTEN1unstable
ADC2 calibration voltage at atten1
ADC2_CAL_VOL_ATTEN2unstable
ADC2 calibration voltage at atten2
ADC2_CAL_VOL_ATTEN3unstable
ADC2 calibration voltage at atten3
ADC2_INIT_CODE_ATTEN0unstable
ADC2 init code at atten0
ADC2_INIT_CODE_ATTEN1unstable
ADC2 init code at atten1
ADC2_INIT_CODE_ATTEN2unstable
ADC2 init code at atten2
ADC2_INIT_CODE_ATTEN3unstable
ADC2 init code at atten3
BLK_VERSION_MAJORunstable
BLK_VERSION_MAJOR of BLOCK2
BLK_VERSION_MINORunstable
BLK_VERSION_MINOR
BLOCK_KEY0unstable
Key0 or user data
BLOCK_KEY1unstable
Key1 or user data
BLOCK_KEY2unstable
Key2 or user data
BLOCK_KEY3unstable
Key3 or user data
BLOCK_KEY4unstable
Key4 or user data
BLOCK_KEY5unstable
Key5 or user data
BLOCK_SYS_DATA2unstable
System data part 2 (reserved)
BLOCK_USR_DATAunstable
User data
BTLC_GPIO_ENABLEunstable
Bluetooth GPIO signal output security level control
CUSTOM_MACunstable
Custom MAC
DIG_DBIAS_HVTunstable
BLOCK1 digital dbias when hvt
DISABLE_BLK_VERSION_MAJORunstable
Disables check of blk version major
DISABLE_WAFER_VERSION_MAJORunstable
Disables check of wafer version major
DIS_APP_CPUunstable
Disable app cpu
DIS_DCACHEunstable
Set this bit to disable Dcache
DIS_DIRECT_BOOTunstable
Disable direct boot mode
DIS_DOWNLOAD_DCACHEunstable
Set this bit to disable Dcache in download mode ( boot_mode[3:0] is 0; 1; 2; 3; 6; 7)
DIS_DOWNLOAD_ICACHEunstable
Set this bit to disable Icache in download mode (boot_mode[3:0] is 0; 1; 2; 3; 6; 7)
DIS_DOWNLOAD_MANUAL_ENCRYPTunstable
Set this bit to disable flash encryption when in download boot modes
DIS_DOWNLOAD_MODEunstable
Set this bit to disable download mode (boot_mode[3:0] = 0; 1; 2; 3; 6; 7)
DIS_FORCE_DOWNLOADunstable
Set this bit to disable the function that forces chip into download mode
DIS_ICACHEunstable
Set this bit to disable Icache
DIS_PAD_JTAGunstable
Set this bit to disable JTAG in the hard way. JTAG is disabled permanently
DIS_RTC_RAM_BOOTunstable
Set this bit to disable boot from RTC RAM
DIS_TWAIunstable
Set this bit to disable CAN function
DIS_USB_JTAGunstable
Set this bit to disable function of usb switch to jtag in module of usb device
DIS_USB_OTGunstable
Set this bit to disable USB function
DIS_USB_OTG_DOWNLOAD_MODEunstable
Set this bit to disable download through USB-OTG
DIS_USB_SERIAL_JTAGunstable
Set this bit to disable usb device
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODEunstable
Set this bit to disable UART download mode through USB
DIS_USB_SERIAL_JTAG_ROM_PRINTunstable
USB printing
ENABLE_SECURITY_DOWNLOADunstable
Set this bit to enable secure UART download mode
FLASH_CAPunstable
Flash capacity
FLASH_ECC_ENunstable
Set 1 to enable ECC for flash boot
FLASH_ECC_MODEunstable
Flash ECC mode in ROM
FLASH_PAGE_SIZEunstable
Set Flash page size
FLASH_TEMPunstable
Flash temperature
FLASH_TPUWunstable
Configures flash waiting time after power-up; in unit of ms. If the value is less than 15; the waiting time is the configurable value. Otherwise; the waiting time is twice the configurable value
FLASH_TYPEunstable
SPI flash type
FLASH_VENDORunstable
Flash vendor
FORCE_SEND_RESUMEunstable
Set this bit to force ROM code to send a resume command during SPI boot
KEY_PURPOSE_0unstable
Purpose of Key0
KEY_PURPOSE_1unstable
Purpose of Key1
KEY_PURPOSE_2unstable
Purpose of Key2
KEY_PURPOSE_3unstable
Purpose of Key3
KEY_PURPOSE_4unstable
Purpose of Key4
KEY_PURPOSE_5unstable
Purpose of Key5
K_DIG_LDOunstable
BLOCK1 K_DIG_LDO
K_RTC_LDOunstable
BLOCK1 K_RTC_LDO
MAC0unstable
MAC address
MAC1unstable
MAC address
OCODEunstable
ADC OCode
OPTIONAL_UNIQUE_IDunstable
Optional unique 128-bit ID
PIN_POWER_SELECTIONunstable
Set default power supply for GPIO33-GPIO37; set when SPI flash is initialized
PKG_VERSIONunstable
Package version
POWERGLITCH_ENunstable
Set this bit to enable power glitch function
POWER_GLITCH_DSENSEunstable
Sample delay configuration of power glitch
PSRAM_CAPunstable
PSRAM capacity
PSRAM_CAP_3unstable
PSRAM capacity bit 3
PSRAM_TEMPunstable
PSRAM temperature
PSRAM_VENDORunstable
PSRAM vendor
RD_DISunstable
Disable reading from BlOCK4-10
RESERVED_0_162unstable
reserved
RESERVED_1_137unstable
reserved
RESERVED_1_176unstable
reserved
RESERVED_1_180unstable
reserved
RESERVED_2_130unstable
reserved
RESERVED_2_255unstable
reserved
RESERVED_3_192unstable
reserved
RESERVED_3_248unstable
reserved
RPT4_RESERVED0unstable
Reserved (used for four backups method)
SECURE_BOOT_AGGRESSIVE_REVOKEunstable
Set this bit to enable revoking aggressive secure boot
SECURE_BOOT_ENunstable
Set this bit to enable secure boot
SECURE_BOOT_KEY_REVOKE0unstable
Revoke 1st secure boot key
SECURE_BOOT_KEY_REVOKE1unstable
Revoke 2nd secure boot key
SECURE_BOOT_KEY_REVOKE2unstable
Revoke 3rd secure boot key
SECURE_VERSIONunstable
Secure version (used by ESP-IDF anti-rollback feature)
SOFT_DIS_JTAGunstable
Set these bits to disable JTAG in the soft way (odd number 1 means disable ). JTAG can be enabled in HMAC module
SPI_BOOT_CRYPT_CNTunstable
Enables flash encryption when 1 or 3 bits are set and disabled otherwise
SPI_PAD_CONFIG_CLKunstable
SPI_PAD_configure CLK
SPI_PAD_CONFIG_CSunstable
SPI_PAD_configure CS
SPI_PAD_CONFIG_Dunstable
SPI_PAD_configure D(D0)
SPI_PAD_CONFIG_D4unstable
SPI_PAD_configure D4
SPI_PAD_CONFIG_D5unstable
SPI_PAD_configure D5
SPI_PAD_CONFIG_D6unstable
SPI_PAD_configure D6
SPI_PAD_CONFIG_D7unstable
SPI_PAD_configure D7
SPI_PAD_CONFIG_DQSunstable
SPI_PAD_configure DQS
SPI_PAD_CONFIG_HDunstable
SPI_PAD_configure HD(D3)
SPI_PAD_CONFIG_Qunstable
SPI_PAD_configure Q(D1)
SPI_PAD_CONFIG_WPunstable
SPI_PAD_configure WP(D2)
STRAP_JTAG_SELunstable
Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio3 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to 0
TEMP_CALIBunstable
Temperature calibration data
UART_PRINT_CONTROLunstable
Set the default UART boot message output mode
USB_DREFHunstable
Controls single-end input threshold vrefh; 1.76 V to 2 V with step of 80 mV; stored in eFuse
USB_DREFLunstable
Controls single-end input threshold vrefl; 0.8 V to 1.04 V with step of 80 mV; stored in eFuse
USB_EXCHG_PINSunstable
Set this bit to exchange USB D+ and D- pins
USB_EXT_PHY_ENABLEunstable
Set this bit to enable external PHY
USB_PHY_SELunstable
This bit is used to switch internal PHY and external PHY for USB OTG and USB Device
VDD_SPI_DCAPunstable
Prevents SPI regulator from overshoot
VDD_SPI_DCURLIMunstable
Tunes the current limit threshold of SPI regulator when tieh=0; about 800 mA/(8+d)
VDD_SPI_DREFHunstable
SPI regulator high voltage reference
VDD_SPI_DREFLunstable
SPI regulator low voltage reference
VDD_SPI_DREFMunstable
SPI regulator medium voltage reference
VDD_SPI_ENCURLIMunstable
Set SPI regulator to 1 to enable output current limit
VDD_SPI_EN_INITunstable
Set SPI regulator to 0 to configure init[1:0]=0
VDD_SPI_FORCEunstable
Set this bit and force to use the configuration of eFuse to configure VDD_SPI
VDD_SPI_INITunstable
Adds resistor from LDO output to ground
VDD_SPI_MODECURLIMunstable
SPI regulator switches current limit mode
VDD_SPI_TIEHunstable
If VDD_SPI_FORCE is 1; determines VDD_SPI voltage
VDD_SPI_XPDunstable
SPI regulator power up signal
V_DIG_DBIAS20unstable
BLOCK1 voltage of digital dbias20
V_RTC_DBIAS20unstable
BLOCK1 voltage of rtc dbias20
WAFER_VERSION_MAJORunstable
WAFER_VERSION_MAJOR
WAFER_VERSION_MINOR_HIunstable
WAFER_VERSION_MINOR most significant bit
WAFER_VERSION_MINOR_LOunstable
WAFER_VERSION_MINOR least significant bits
WDT_DELAY_SELunstable
RTC watchdog timeout threshold; in unit of slow clock cycle
WR_DISunstable
Disable programming of individual eFuses

Functions§

base_mac_addressunstable
Returns the base MAC address programmed into eFuse during manufacturing.
block_versionunstable
Get efuse block version
chip_revision
Returns the hardware revision.
flash_encryptionunstable
Get status of SPI boot encryption.
interface_mac_address
Returns the MAC address for a specific interface, derived from the base MAC.
major_chip_versionunstable
Returns the major hardware revision
minor_chip_versionunstable
Returns the minor hardware revision
override_mac_addressunstable
Overrides the base MAC address used by interface_mac_address.
read_bitunstable
Read bit value.
read_field_leunstable
Read field value in a little-endian order
rtc_calib_cal_codeunstable
Get ADC reference point digital code for specified attenuation
rtc_calib_cal_mvunstable
Get ADC reference point voltage for specified attenuation in millivolts
rtc_calib_init_codeunstable
Get ADC initial code for specified attenuation from efuse
rtc_calib_versionunstable
Get version of RTC calibration block
rwdt_multiplierunstable
Get the multiplier for the timeout value of the RWDT STAGE 0 register.