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Module sleep

Module sleep 

Source
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§RTC Control Sleep Module

§Overview

The sleep module allows configuring various wakeup sources and setting up the sleep behavior based on those sources. The supported wakeup sources include:

  • GPIO pins - light sleep only
  • timers
  • SDIO (Secure Digital Input/Output) - light sleep only
  • MAC (Media Access Control) wake - light sleep only
  • UART0 - light sleep only
  • UART1 - light sleep only
  • touch
  • ULP (Ultra-Low Power) wake
  • BT (Bluetooth) wake - light sleep only

Structs§

GpioWakeupSource
GPIO wakeup source
RtcConfigunstable
RTC Configuration.
RtcInitConfigunstable
Configuration for RTC initialization.
RtcSleepConfigunstable
Configuration for RTC sleep mode.
RtcioWakeupSource
RTC_IO wakeup source
TimerWakeupSource
Represents a timer wake-up source, triggering an event after a specified duration.
Uart0WakeupSource
UART0 wakeup source
Uart1WakeupSource
UART1 wakeup source
WakeTriggers
Represents the wakeup triggers.

Enums§

Error
Errors that can occur when configuring RTC wake-up sources.
WakeupLevel
Level at which a wake-up event is triggered

Constants§

GPIO_INTR_DISABLEunstable
Disables GPIO interrupt.
GPIO_INTR_HIGH_LEVELunstable
Sets GPIO interrupt to trigger on a high level signal.
GPIO_INTR_LOW_LEVELunstable
Sets GPIO interrupt to trigger on a low level signal.
GPIO_NUM_MAXunstable
Maximum number of GPIO pins supported.
OTHER_BLOCKS_POWERUPunstable
Power-up cycles for other hardware blocks.
OTHER_BLOCKS_WAITunstable
Wait cycles for other hardware blocks to stabilize.
PIN_FUNC_GPIOunstable
Specifies the function configuration for GPIO pins.
RTC_CK8M_ENABLE_WAIT_DEFAULTunstable
Default number of cycles required to enable the internal 8MHz clock.
RTC_CNTL_BIASSLP_MONITOR_DEFAULTunstable
Default bias setting for sleep mode in the monitor mode.
RTC_CNTL_BIASSLP_SLEEP_DEFAULTunstable
Default bias setting during sleep mode.
RTC_CNTL_BIASSLP_SLEEP_ONunstable
Keeps the bias for ultra-low power sleep mode always on.
RTC_CNTL_CK8M_WAIT_DEFAULTunstable
Default number of cycles to wait for the internal 8MHz clock to stabilize.
RTC_CNTL_DBG_ATTEN_DEEPSLEEP_DEFAULTunstable
Default attenuation setting during deep sleep, with maximum voltage drop.
RTC_CNTL_DBG_ATTEN_DEEPSLEEP_NODROPunstable
No attenuation (no voltage drop) during deep sleep.
RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_DEFAULTunstable
Default attenuation setting during light sleep, with a voltage drop.
RTC_CNTL_DBG_ATTEN_LIGHTSLEEP_NODROPunstable
No attenuation (no voltage drop) during light sleep.
RTC_CNTL_DBG_ATTEN_MONITOR_DEFAULTunstable
Default debug attenuation setting for the monitor mode.
RTC_CNTL_DBIAS_0V90unstable
Digital bias voltage level of 0.90V.
RTC_CNTL_DBIAS_0V95unstable
Digital bias voltage level of 0.95V.
RTC_CNTL_DBIAS_1V00unstable
Digital bias voltage level of 1.00V.
RTC_CNTL_DBIAS_1V05unstable
Digital bias voltage level of 1.05V.
RTC_CNTL_DBIAS_1V10unstable
Digital bias voltage level of 1.10V.
RTC_CNTL_DBIAS_1V15unstable
Digital bias voltage level of 1.15V.
RTC_CNTL_DBIAS_1V20unstable
Digital bias voltage level of 1.20V.
RTC_CNTL_DBIAS_1V25unstable
Digital bias voltage level of 1.25V.
RTC_CNTL_DBIAS_1V30unstable
Digital bias voltage level of approximately 1.34V.
RTC_CNTL_DG_VDD_DRV_B_SLP_DEFAULTunstable
Default driver bias setting for the digital domain during sleep mode.
RTC_CNTL_MIN_SLP_VAL_MINunstable
Minimum number of cycles for sleep duration.
RTC_CNTL_PD_CUR_MONITOR_DEFAULTunstable
Default power-down current setting for the monitor mode.
RTC_CNTL_PD_CUR_SLEEP_DEFAULTunstable
Default power-down current setting during sleep mode.
RTC_CNTL_PD_CUR_SLEEP_ONunstable
Keeps the power-down current setting for sleep mode always on.
RTC_CNTL_PLL_BUF_WAIT_DEFAULTunstable
Default number of cycles to wait for the PLL buffer to stabilize.
RTC_CNTL_XTL_BUF_WAIT_DEFAULTunstable
Default number of cycles to wait for the XTL buffer to stabilize.
SIG_GPIO_OUT_IDXunstable
Index for signaling GPIO output.

Traits§

WakeSource
Trait representing a wakeup source.