1use super::{Blocking, DriverMode, Uart, UartTx};
2#[cfg(feature = "unstable")]
3use crate::{
4 interrupt::InterruptHandler,
5 uart::{Async, Config, ConfigError, IoError, RxError, TxError, UartRx},
6};
7
8#[instability::unstable]
9impl embedded_io_06::Error for RxError {
10 fn kind(&self) -> embedded_io_06::ErrorKind {
11 embedded_io_06::ErrorKind::Other
12 }
13}
14
15#[instability::unstable]
16impl embedded_io_07::Error for RxError {
17 fn kind(&self) -> embedded_io_07::ErrorKind {
18 embedded_io_07::ErrorKind::Other
19 }
20}
21
22#[instability::unstable]
23impl embedded_io_06::Error for TxError {
24 fn kind(&self) -> embedded_io_06::ErrorKind {
25 embedded_io_06::ErrorKind::Other
26 }
27}
28#[instability::unstable]
29impl embedded_io_07::Error for TxError {
30 fn kind(&self) -> embedded_io_07::ErrorKind {
31 embedded_io_07::ErrorKind::Other
32 }
33}
34
35#[instability::unstable]
36impl<Dm> embassy_embedded_hal::SetConfig for Uart<'_, Dm>
37where
38 Dm: DriverMode,
39{
40 type Config = Config;
41 type ConfigError = ConfigError;
42
43 fn set_config(&mut self, config: &Self::Config) -> Result<(), Self::ConfigError> {
44 self.apply_config(config)
45 }
46}
47
48#[instability::unstable]
49impl<Dm> embassy_embedded_hal::SetConfig for UartRx<'_, Dm>
50where
51 Dm: DriverMode,
52{
53 type Config = Config;
54 type ConfigError = ConfigError;
55
56 fn set_config(&mut self, config: &Self::Config) -> Result<(), Self::ConfigError> {
57 self.apply_config(config)
58 }
59}
60
61#[instability::unstable]
62impl<Dm> embassy_embedded_hal::SetConfig for UartTx<'_, Dm>
63where
64 Dm: DriverMode,
65{
66 type Config = Config;
67 type ConfigError = ConfigError;
68
69 fn set_config(&mut self, config: &Self::Config) -> Result<(), Self::ConfigError> {
70 self.baudrate = config.baudrate;
71 self.apply_config(config)
72 }
73}
74
75impl crate::private::Sealed for Uart<'_, Blocking> {}
76
77#[instability::unstable]
78impl crate::interrupt::InterruptConfigurable for Uart<'_, Blocking> {
79 fn set_interrupt_handler(&mut self, handler: InterruptHandler) {
80 self.tx.uart.set_interrupt_handler(handler);
82 }
83}
84
85#[instability::unstable]
86impl<Dm> ufmt_write::uWrite for Uart<'_, Dm>
87where
88 Dm: DriverMode,
89{
90 type Error = TxError;
91
92 #[inline]
93 fn write_str(&mut self, s: &str) -> Result<(), Self::Error> {
94 self.tx.write_str(s)
95 }
96
97 #[inline]
98 fn write_char(&mut self, ch: char) -> Result<(), Self::Error> {
99 self.tx.write_char(ch)
100 }
101}
102
103#[instability::unstable]
104impl<Dm> ufmt_write::uWrite for UartTx<'_, Dm>
105where
106 Dm: DriverMode,
107{
108 type Error = TxError;
109
110 #[inline]
111 fn write_str(&mut self, s: &str) -> Result<(), Self::Error> {
112 self.write_all(s.as_bytes())
113 }
114}
115
116impl<Dm> core::fmt::Write for Uart<'_, Dm>
117where
118 Dm: DriverMode,
119{
120 #[inline]
121 fn write_str(&mut self, s: &str) -> core::fmt::Result {
122 self.tx.write_str(s)
123 }
124}
125
126impl<Dm> core::fmt::Write for UartTx<'_, Dm>
127where
128 Dm: DriverMode,
129{
130 #[inline]
131 fn write_str(&mut self, s: &str) -> core::fmt::Result {
132 self.write_all(s.as_bytes()).map_err(|_| core::fmt::Error)
133 }
134}
135
136#[instability::unstable]
137impl embedded_io_06::Error for IoError {
138 fn kind(&self) -> embedded_io_06::ErrorKind {
139 embedded_io_06::ErrorKind::Other
140 }
141}
142
143#[instability::unstable]
144impl embedded_io_07::Error for IoError {
145 fn kind(&self) -> embedded_io_07::ErrorKind {
146 embedded_io_07::ErrorKind::Other
147 }
148}
149
150#[instability::unstable]
151impl<Dm: DriverMode> embedded_io_06::ErrorType for Uart<'_, Dm> {
152 type Error = IoError;
153}
154
155#[instability::unstable]
156impl<Dm: DriverMode> embedded_io_06::ErrorType for UartTx<'_, Dm> {
157 type Error = TxError;
158}
159
160#[instability::unstable]
161impl<Dm: DriverMode> embedded_io_06::ErrorType for UartRx<'_, Dm> {
162 type Error = RxError;
163}
164
165#[instability::unstable]
166impl<Dm> embedded_io_06::Read for Uart<'_, Dm>
167where
168 Dm: DriverMode,
169{
170 fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
171 self.rx.read(buf).map_err(IoError::Rx)
172 }
173}
174
175#[instability::unstable]
176impl<Dm> embedded_io_06::Read for UartRx<'_, Dm>
177where
178 Dm: DriverMode,
179{
180 fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
181 self.read(buf)
182 }
183}
184
185#[instability::unstable]
186impl<Dm> embedded_io_06::ReadReady for Uart<'_, Dm>
187where
188 Dm: DriverMode,
189{
190 fn read_ready(&mut self) -> Result<bool, Self::Error> {
191 Ok(self.rx.read_ready())
192 }
193}
194
195#[instability::unstable]
196impl<Dm> embedded_io_06::ReadReady for UartRx<'_, Dm>
197where
198 Dm: DriverMode,
199{
200 fn read_ready(&mut self) -> Result<bool, Self::Error> {
201 Ok(UartRx::read_ready(self))
202 }
203}
204
205#[instability::unstable]
206impl<Dm> embedded_io_06::Write for Uart<'_, Dm>
207where
208 Dm: DriverMode,
209{
210 fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
211 self.tx.write(buf).map_err(IoError::Tx)
212 }
213
214 fn flush(&mut self) -> Result<(), Self::Error> {
215 self.tx.flush().map_err(IoError::Tx)
216 }
217}
218
219#[instability::unstable]
220impl<Dm> embedded_io_06::Write for UartTx<'_, Dm>
221where
222 Dm: DriverMode,
223{
224 fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
225 self.write(buf)
226 }
227
228 fn flush(&mut self) -> Result<(), Self::Error> {
229 self.flush()
230 }
231}
232
233#[instability::unstable]
234impl<Dm> embedded_io_06::WriteReady for UartTx<'_, Dm>
235where
236 Dm: DriverMode,
237{
238 fn write_ready(&mut self) -> Result<bool, Self::Error> {
239 Ok(UartTx::write_ready(self))
240 }
241}
242
243#[instability::unstable]
244impl<Dm> embedded_io_06::WriteReady for Uart<'_, Dm>
245where
246 Dm: DriverMode,
247{
248 fn write_ready(&mut self) -> Result<bool, Self::Error> {
249 Ok(self.tx.write_ready())
250 }
251}
252
253#[instability::unstable]
254impl<Dm: DriverMode> embedded_io_07::ErrorType for Uart<'_, Dm> {
255 type Error = IoError;
256}
257
258#[instability::unstable]
259impl<Dm: DriverMode> embedded_io_07::ErrorType for UartTx<'_, Dm> {
260 type Error = TxError;
261}
262
263#[instability::unstable]
264impl<Dm: DriverMode> embedded_io_07::ErrorType for UartRx<'_, Dm> {
265 type Error = RxError;
266}
267
268#[instability::unstable]
269impl<Dm> embedded_io_07::Read for Uart<'_, Dm>
270where
271 Dm: DriverMode,
272{
273 fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
274 self.rx.read(buf).map_err(IoError::Rx)
275 }
276}
277
278#[instability::unstable]
279impl<Dm> embedded_io_07::Read for UartRx<'_, Dm>
280where
281 Dm: DriverMode,
282{
283 fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
284 self.read(buf)
285 }
286}
287
288#[instability::unstable]
289impl<Dm> embedded_io_07::ReadReady for Uart<'_, Dm>
290where
291 Dm: DriverMode,
292{
293 fn read_ready(&mut self) -> Result<bool, Self::Error> {
294 Ok(self.rx.read_ready())
295 }
296}
297
298#[instability::unstable]
299impl<Dm> embedded_io_07::ReadReady for UartRx<'_, Dm>
300where
301 Dm: DriverMode,
302{
303 fn read_ready(&mut self) -> Result<bool, Self::Error> {
304 Ok(UartRx::read_ready(self))
305 }
306}
307
308#[instability::unstable]
309impl<Dm> embedded_io_07::Write for Uart<'_, Dm>
310where
311 Dm: DriverMode,
312{
313 fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
314 self.tx.write(buf).map_err(IoError::Tx)
315 }
316
317 fn flush(&mut self) -> Result<(), Self::Error> {
318 self.tx.flush().map_err(IoError::Tx)
319 }
320}
321
322#[instability::unstable]
323impl<Dm> embedded_io_07::Write for UartTx<'_, Dm>
324where
325 Dm: DriverMode,
326{
327 fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
328 self.write(buf)
329 }
330
331 fn flush(&mut self) -> Result<(), Self::Error> {
332 self.flush()
333 }
334}
335
336#[instability::unstable]
337impl<Dm> embedded_io_07::WriteReady for UartTx<'_, Dm>
338where
339 Dm: DriverMode,
340{
341 fn write_ready(&mut self) -> Result<bool, Self::Error> {
342 Ok(UartTx::write_ready(self))
343 }
344}
345
346#[instability::unstable]
347impl<Dm> embedded_io_07::WriteReady for Uart<'_, Dm>
348where
349 Dm: DriverMode,
350{
351 fn write_ready(&mut self) -> Result<bool, Self::Error> {
352 Ok(self.tx.write_ready())
353 }
354}
355
356#[instability::unstable]
357impl embedded_io_async_06::Read for Uart<'_, Async> {
358 async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
359 self.read_async(buf).await.map_err(IoError::Rx)
360 }
361
362 async fn read_exact(
363 &mut self,
364 buf: &mut [u8],
365 ) -> Result<(), embedded_io_06::ReadExactError<Self::Error>> {
366 self.read_exact_async(buf)
367 .await
368 .map_err(|e| embedded_io_06::ReadExactError::Other(IoError::Rx(e)))
369 }
370}
371
372#[instability::unstable]
373impl embedded_io_async_06::Read for UartRx<'_, Async> {
374 async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
375 self.read_async(buf).await
376 }
377
378 async fn read_exact(
379 &mut self,
380 buf: &mut [u8],
381 ) -> Result<(), embedded_io_06::ReadExactError<Self::Error>> {
382 self.read_exact_async(buf)
383 .await
384 .map_err(embedded_io_06::ReadExactError::Other)
385 }
386}
387
388#[instability::unstable]
389impl embedded_io_async_06::Write for Uart<'_, Async> {
390 async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
391 self.write_async(buf).await.map_err(IoError::Tx)
392 }
393
394 async fn flush(&mut self) -> Result<(), Self::Error> {
395 self.flush_async().await.map_err(IoError::Tx)
396 }
397}
398
399#[instability::unstable]
400impl embedded_io_async_06::Write for UartTx<'_, Async> {
401 async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
402 self.write_async(buf).await
403 }
404
405 async fn flush(&mut self) -> Result<(), Self::Error> {
406 self.flush_async().await
407 }
408}
409
410#[instability::unstable]
411impl embedded_io_async_07::Read for Uart<'_, Async> {
412 async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
413 self.read_async(buf).await.map_err(IoError::Rx)
414 }
415
416 async fn read_exact(
417 &mut self,
418 buf: &mut [u8],
419 ) -> Result<(), embedded_io_07::ReadExactError<Self::Error>> {
420 self.read_exact_async(buf)
421 .await
422 .map_err(|e| embedded_io_07::ReadExactError::Other(IoError::Rx(e)))
423 }
424}
425
426#[instability::unstable]
427impl embedded_io_async_07::Read for UartRx<'_, Async> {
428 async fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
429 self.read_async(buf).await
430 }
431
432 async fn read_exact(
433 &mut self,
434 buf: &mut [u8],
435 ) -> Result<(), embedded_io_07::ReadExactError<Self::Error>> {
436 self.read_exact_async(buf)
437 .await
438 .map_err(embedded_io_07::ReadExactError::Other)
439 }
440}
441
442#[instability::unstable]
443impl embedded_io_async_07::Write for Uart<'_, Async> {
444 async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
445 self.write_async(buf).await.map_err(IoError::Tx)
446 }
447
448 async fn flush(&mut self) -> Result<(), Self::Error> {
449 self.flush_async().await.map_err(IoError::Tx)
450 }
451}
452
453#[instability::unstable]
454impl embedded_io_async_07::Write for UartTx<'_, Async> {
455 async fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
456 self.write_async(buf).await
457 }
458
459 async fn flush(&mut self) -> Result<(), Self::Error> {
460 self.flush_async().await
461 }
462}