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esp_hal/i2c/
mod.rs

1//! # Inter-Integrated Circuit (I2C)
2//!
3//! I2C is a serial, synchronous, multi-device, half-duplex communication
4//! protocol that allows co-existence of multiple masters and slaves on the
5//! same bus. I2C uses two bidirectional open-drain lines: serial data line
6//! (SDA) and serial clock line (SCL), pulled up by resistors.
7//!
8//! For more information, see
9#![doc = crate::trm_markdown_link!("i2c")]
10
11#[cfg(i2c_master_driver_supported)]
12pub mod master;
13
14crate::unstable_driver! {
15    #[cfg(i2c_slave_driver_supported)]
16    pub mod slave;
17
18    #[cfg(lp_i2c_master_driver_supported)]
19    pub mod lp_i2c;
20}
21
22#[cfg_attr(i2c_master_version = "1", path = "clocks/v1.rs")]
23#[cfg_attr(i2c_master_version = "2", path = "clocks/v2.rs")]
24#[cfg_attr(i2c_master_version = "3", path = "clocks/v3.rs")]
25#[cfg_attr(soc_has_pcr, path = "clocks/v4_pcr.rs")]
26#[cfg_attr(esp32p4, path = "clocks/v4_esp32p4.rs")]
27#[cfg_attr(esp32s31, path = "clocks/v4_esp32s31.rs")]
28mod clocks;