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Module efuse

Module efuse 

Source
Expand description

§eFuse (one-time programmable configuration)

§Overview

The efuse module provides functionality for reading eFuse data from the chip, allowing access to various chip-specific information such as:

  • MAC address
  • Chip revision

and more. It is useful for retrieving chip-specific configuration and identification data during runtime.

Structs§

ChipRevision
Represents the hardware revision.
EfuseFieldunstable
The bit field for get access to efuse data
MacAddress
Hardware (MAC) address.

Enums§

AdcCalibUnitunstable
Selects which ADC we are interested in the efuse calibration data for
SetMacErrorunstable
Error indicating issues with setting the MAC address.

Constants§

ACTIVE_HP_DBIASunstable
Active HP DBIAS of fixed voltage
ACTIVE_LP_DBIASunstable
Active LP DBIAS of fixed voltage
ADC1_AVE_INITCODE_ATTEN0unstable
Average initcode of ADC1 atten0
ADC1_AVE_INITCODE_ATTEN1unstable
Average initcode of ADC1 atten1
ADC1_AVE_INITCODE_ATTEN2unstable
Average initcode of ADC1 atten2
ADC1_AVE_INITCODE_ATTEN3unstable
Average initcode of ADC1 atten3
ADC1_CH0_ATTEN0_INITCODE_DIFFunstable
Gap between ADC1_ch0 and average initcode
ADC1_CH1_ATTEN0_INITCODE_DIFFunstable
Gap between ADC1_ch1 and average initcode
ADC1_CH2_ATTEN0_INITCODE_DIFFunstable
Gap between ADC1_ch2 and average initcode
ADC1_CH3_ATTEN0_INITCODE_DIFFunstable
Gap between ADC1_ch3 and average initcode
ADC1_CH4_ATTEN0_INITCODE_DIFFunstable
Gap between ADC1_ch4 and average initcode
ADC1_CH5_ATTEN0_INITCODE_DIFFunstable
Gap between ADC1_ch5 and average initcode
ADC1_CH6_ATTEN0_INITCODE_DIFFunstable
Gap between ADC1_ch6 and average initcode
ADC1_CH7_ATTEN0_INITCODE_DIFFunstable
Gap between ADC1_ch7 and average initcode
ADC1_HI_DOUT_ATTEN0unstable
HI_DOUT of ADC1 atten0
ADC1_HI_DOUT_ATTEN1unstable
HI_DOUT of ADC1 atten1
ADC1_HI_DOUT_ATTEN2unstable
HI_DOUT of ADC1 atten2
ADC1_HI_DOUT_ATTEN3unstable
HI_DOUT of ADC1 atten3
ADC2_AVE_INITCODE_ATTEN0unstable
Average initcode of ADC2 atten0
ADC2_AVE_INITCODE_ATTEN1unstable
Average initcode of ADC2 atten1
ADC2_AVE_INITCODE_ATTEN2unstable
Average initcode of ADC2 atten2
ADC2_AVE_INITCODE_ATTEN3unstable
Average initcode of ADC2 atten3
ADC2_CH0_ATTEN0_INITCODE_DIFFunstable
Gap between ADC2_ch0 and average initcode
ADC2_CH1_ATTEN0_INITCODE_DIFFunstable
Gap between ADC2_ch1 and average initcode
ADC2_CH2_ATTEN0_INITCODE_DIFFunstable
Gap between ADC2_ch2 and average initcode
ADC2_CH3_ATTEN0_INITCODE_DIFFunstable
Gap between ADC2_ch3 and average initcode
ADC2_CH4_ATTEN0_INITCODE_DIFFunstable
Gap between ADC2_ch4 and average initcode
ADC2_CH5_ATTEN0_INITCODE_DIFFunstable
Gap between ADC2_ch5 and average initcode
ADC2_HI_DOUT_ATTEN0unstable
HI_DOUT of ADC2 atten0
ADC2_HI_DOUT_ATTEN1unstable
HI_DOUT of ADC2 atten1
ADC2_HI_DOUT_ATTEN2unstable
HI_DOUT of ADC2 atten2
ADC2_HI_DOUT_ATTEN3unstable
HI_DOUT of ADC2 atten3
BLK_VERSION_MAJORunstable
BLK_VERSION_MAJOR of BLOCK2
BLK_VERSION_MINORunstable
BLK_VERSION_MINOR of BLOCK2
DISABLE_BLK_VERSION_MAJORunstable
Disables check of blk version major
DISABLE_WAFER_VERSION_MAJORunstable
Disables check of wafer version major
DIS_DIRECT_BOOTunstable
Set this bit to disable direct boot mode
DIS_DOWNLOAD_MANUAL_ENCRYPTunstable
Set this bit to disable flash manual encrypt function (except in SPI boot mode)
DIS_DOWNLOAD_MODEunstable
Set this bit to disable download mode (boot_mode[3:0] = 0; 1; 2; 4; 5; 6; 7)
DIS_FORCE_DOWNLOADunstable
Set this bit to disable the function that forces chip into download mode
DIS_PAD_JTAGunstable
Set this bit to disable JTAG in the hard way. JTAG is disabled permanently
DIS_SWDunstable
Set bit to disable super-watchdog
DIS_TWAIunstable
Set this bit to disable TWAI function
DIS_USB_JTAGunstable
Set this bit to disable function of usb switch to jtag in module of usb device
DIS_USB_OTG_DOWNLOAD_MODEunstable
Set this bit to disable download via USB-OTG
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODEunstable
Set this bit to disable the USB-Serial-JTAG download function
DIS_USB_SERIAL_JTAG_ROM_PRINTunstable
Set this bit to disable USB-Serial-JTAG print during rom boot
DIS_WDTunstable
Set this bit to disable watch dog
DSLP_DBGunstable
DSLP BDG of fixed voltage
DSLP_LP_DBIASunstable
DSLP LP DBIAS of fixed voltage
ECC_FORCE_CONST_TIMEunstable
Set this bit to permanently turn on ECC const-time mode
ENABLE_SECURITY_DOWNLOADunstable
Set this bit to enable security download mode
FLASH_ECC_ENunstable
Set this bit to enable ECC for flash boot
FLASH_TPUWunstable
Configures flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the configurable value. Otherwise; the waiting time is 30
FORCE_DISABLE_SW_INIT_KEYunstable
Set this bit to disable software written init key; and force use efuse_init_key
FORCE_SEND_RESUMEunstable
Set this bit to force ROM code to send a resume command during SPI boot
FORCE_USE_KEY_MANAGER_KEYunstable
EFUSE_FORCE_USE_KEY_MANAGER_KEY and EFUSE_FORCE_USE_KEY_MANAGER_KEY_H together form one field: {EFUSE_FORCE_USE_KEY_MANAGER_KEY_H; EFUSE_FORCE_USE_KEY_MANAGER_KEY[3:0]}. Set each bit to control whether corresponding key must come from key manager. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds; bit4:psram
HP_PWR_SRC_SELunstable
HP system power source select. 0:LDO 1: DCDC
HUK_GEN_STATEunstable
Set the bits to control validation of HUK generate mode. Odd of 1 is invalid; even of 1 is valid
HYS_EN_PADunstable
Set bits to enable hysteresis function of PAD0~27
JTAG_SEL_ENABLEunstable
Set this bit to enable selection between usb_to_jtag and pad_to_jtag through strapping gpio25 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0
KEY0unstable
[BLOCK_KEY0] Key0 or user data
KEY1unstable
[BLOCK_KEY1] Key1 or user data
KEY2unstable
[BLOCK_KEY2] Key2 or user data
KEY3unstable
[BLOCK_KEY3] Key3 or user data
KEY4unstable
[BLOCK_KEY4] Key4 or user data
KEY5unstable
[BLOCK_KEY5] Key5 or user data
KEY_PURPOSE_0unstable
[KEY0_PURPOSE] Purpose of Key0
KEY_PURPOSE_1unstable
[KEY1_PURPOSE] Purpose of Key1
KEY_PURPOSE_2unstable
[KEY2_PURPOSE] Purpose of Key2
KEY_PURPOSE_3unstable
[KEY3_PURPOSE] Purpose of Key3
KEY_PURPOSE_4unstable
[KEY4_PURPOSE] Purpose of Key4
KEY_PURPOSE_5unstable
[KEY5_PURPOSE] Purpose of Key5
KM_DEPLOY_ONLY_ONCEunstable
EFUSE_KM_DEPLOY_ONLY_ONCE and EFUSE_KM_DEPLOY_ONLY_ONCE_H together form one field: {EFUSE_KM_DEPLOY_ONLY_ONCE_H; EFUSE_KM_DEPLOY_ONLY_ONCE[3:0]}. Set each bit to control whether corresponding key can only be deployed once. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds; bit4:psram
KM_DISABLE_DEPLOY_MODEunstable
EFUSE_KM_DISABLE_DEPLOY_MODE and EFUSE_KM_DISABLE_DEPLOY_MODE_H together form one field: {EFUSE_KM_DISABLE_DEPLOY_MODE_H; EFUSE_KM_DISABLE_DEPLOY_MODE[3:0]}. Set each bit to control whether corresponding key’s deploy mode of new value deployment is disabled. 1 is true; 0 is false. bit 0: ecsda; bit 1: xts; bit2: hmac; bit3: ds; bit4:psram
KM_RND_SWITCH_CYCLEunstable
Set the bits to control key manager random number switch cycle. 0: control by register. 1: 8 km clk cycles. 2: 16 km cycles. 3: 32 km cycles
KM_XTS_KEY_LENGTH_256unstable
Set this bit to config flash encryption xts-512 key; else use xts-256 key when using the key manager
LDO_VO1_DREFunstable
Output VO1 parameter
LDO_VO1_MULunstable
Output VO1 parameter
LDO_VO2_DREFunstable
Output VO2 parameter
LDO_VO2_MULunstable
Output VO2 parameter
LDO_VO3_Cunstable
Output VO3 calibration parameter
LDO_VO3_Kunstable
Output VO3 calibration parameter
LDO_VO3_VOSunstable
Output VO3 calibration parameter
LDO_VO4_Cunstable
Output VO4 calibration parameter
LDO_VO4_Kunstable
Output VO4 calibration parameter
LDO_VO4_VOSunstable
Output VO4 calibration parameter
LOCK_KM_KEYunstable
set this bit to lock the key manager key after deploy
LP_DCDC_DBIAS_VOL_GAPunstable
DBIAS gap between LP and DCDC
MAC0unstable
[MAC_FACTORY] MAC address (low 32 bits)
MAC1unstable
[MAC_FACTORY] MAC address (high 16 bits)
OPTIONAL_UNIQUE_IDunstable
Optional unique 128-bit ID
PKG_VERSIONunstable
Package version
PSRAM_CAPunstable
PSRAM capacity
PSRAM_VENDORunstable
PSRAM vendor
PVT_40M_BIASunstable
PVT_DCM_VSET corresponding to about 0.9V fixed voltage when the CPU is at 40M
PVT_100M_BIASunstable
PVT_DCM_VSET corresponding to about 1.0V fixed voltage when the CPU is at 100M
PVT_400M_BIASunstable
PVT_DCM_VSET when the CPU is at 400M
PVT_GLITCH_ENunstable
Represents whether to enable PVT power glitch monitor function.1:Enable. 0:Disable
PVT_GLITCH_MODEunstable
Use to configure glitch mode
PXA0_TIEH_SEL_0unstable
Output LDO VO0 tieh source select. 0: 1’b1 1: sdmmc1 2: reg 3:sdmmc0
RD_DISunstable
Disable reading from BlOCK4-10
RD_DIS_ADC1_CH0_ATTEN0_INITCODE_DIFFunstable
rd_dis of ADC1_CH0_ATTEN0_INITCODE_DIFF
RD_DIS_ADC1_CH1_ATTEN0_INITCODE_DIFFunstable
rd_dis of ADC1_CH1_ATTEN0_INITCODE_DIFF
RD_DIS_ADC1_CH2_ATTEN0_INITCODE_DIFFunstable
rd_dis of ADC1_CH2_ATTEN0_INITCODE_DIFF
RD_DIS_ADC1_CH3_ATTEN0_INITCODE_DIFFunstable
rd_dis of ADC1_CH3_ATTEN0_INITCODE_DIFF
RD_DIS_ADC1_CH4_ATTEN0_INITCODE_DIFFunstable
rd_dis of ADC1_CH4_ATTEN0_INITCODE_DIFF
RD_DIS_ADC1_CH5_ATTEN0_INITCODE_DIFFunstable
rd_dis of ADC1_CH5_ATTEN0_INITCODE_DIFF
RD_DIS_ADC1_CH6_ATTEN0_INITCODE_DIFFunstable
rd_dis of ADC1_CH6_ATTEN0_INITCODE_DIFF
RD_DIS_ADC1_CH7_ATTEN0_INITCODE_DIFFunstable
rd_dis of ADC1_CH7_ATTEN0_INITCODE_DIFF
RD_DIS_ADC2_CH0_ATTEN0_INITCODE_DIFFunstable
rd_dis of ADC2_CH0_ATTEN0_INITCODE_DIFF
RD_DIS_ADC2_CH1_ATTEN0_INITCODE_DIFFunstable
rd_dis of ADC2_CH1_ATTEN0_INITCODE_DIFF
RD_DIS_ADC2_CH2_ATTEN0_INITCODE_DIFFunstable
rd_dis of ADC2_CH2_ATTEN0_INITCODE_DIFF
RD_DIS_ADC2_CH3_ATTEN0_INITCODE_DIFFunstable
rd_dis of ADC2_CH3_ATTEN0_INITCODE_DIFF
RD_DIS_ADC2_CH4_ATTEN0_INITCODE_DIFFunstable
rd_dis of ADC2_CH4_ATTEN0_INITCODE_DIFF
RD_DIS_ADC2_CH5_ATTEN0_INITCODE_DIFFunstable
rd_dis of ADC2_CH5_ATTEN0_INITCODE_DIFF
RD_DIS_ADC2_HI_DOUT_ATTEN0unstable
rd_dis of ADC2_HI_DOUT_ATTEN0
RD_DIS_ADC2_HI_DOUT_ATTEN1unstable
rd_dis of ADC2_HI_DOUT_ATTEN1
RD_DIS_ADC2_HI_DOUT_ATTEN2unstable
rd_dis of ADC2_HI_DOUT_ATTEN2
RD_DIS_ADC2_HI_DOUT_ATTEN3unstable
rd_dis of ADC2_HI_DOUT_ATTEN3
RD_DIS_BLOCK_KEY0unstable
[RD_DIS.KEY0] rd_dis of BLOCK_KEY0
RD_DIS_BLOCK_KEY1unstable
[RD_DIS.KEY1] rd_dis of BLOCK_KEY1
RD_DIS_BLOCK_KEY2unstable
[RD_DIS.KEY2] rd_dis of BLOCK_KEY2
RD_DIS_BLOCK_KEY3unstable
[RD_DIS.KEY3] rd_dis of BLOCK_KEY3
RD_DIS_BLOCK_KEY4unstable
[RD_DIS.KEY4] rd_dis of BLOCK_KEY4
RD_DIS_BLOCK_KEY5unstable
[RD_DIS.KEY5] rd_dis of BLOCK_KEY5
RD_DIS_BLOCK_SYS_DATA2unstable
[RD_DIS.SYS_DATA_PART2] rd_dis of BLOCK_SYS_DATA2
RD_DIS_TEMPERATURE_SENSORunstable
rd_dis of TEMPERATURE_SENSOR
RD_DIS_USB_DEVICE_EXCHG_PINSunstable
rd_dis of USB_DEVICE_EXCHG_PINS
RD_DIS_USB_OTG11_EXCHG_PINSunstable
rd_dis of USB_OTG11_EXCHG_PINS
RECOVERY_BOOTLOADER_FLASH_SECTOR_0_1unstable
Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled
RECOVERY_BOOTLOADER_FLASH_SECTOR_2_2unstable
Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled
RECOVERY_BOOTLOADER_FLASH_SECTOR_3_6unstable
Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled
RECOVERY_BOOTLOADER_FLASH_SECTOR_7_7unstable
Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled
RECOVERY_BOOTLOADER_FLASH_SECTOR_8_10unstable
Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled
RECOVERY_BOOTLOADER_FLASH_SECTOR_11_11unstable
Represents the starting flash sector (flash sector size is 0x1000) of the recovery bootloader used by the ROM bootloader If the primary bootloader fails. 0 and 0xFFF - this feature is disabled
SECURE_BOOT_AGGRESSIVE_REVOKEunstable
Set this bit to enable revoking aggressive secure boot
SECURE_BOOT_DISABLE_FAST_WAKEunstable
Represents whether secure boot do fast verification on wake is disabled. 0: enabled 1: disabled
SECURE_BOOT_ENunstable
Set this bit to enable secure boot
SECURE_BOOT_KEY_REVOKE0unstable
Revoke 1st secure boot key
SECURE_BOOT_KEY_REVOKE1unstable
Revoke 2nd secure boot key
SECURE_BOOT_KEY_REVOKE2unstable
Revoke 3rd secure boot key
SECURE_BOOT_SHA384_ENunstable
Represents whether secure boot using SHA-384 is enabled. 0: disable 1: enable
SECURE_VERSIONunstable
Secure version used by ESP-IDF anti-rollback feature
SEC_DPA_LEVELunstable
Configures the clock random divide mode to determine the dpa secure level
SOFT_DIS_JTAGunstable
Set odd bits to disable JTAG in the soft way. JTAG can be enabled in HMAC module
SPI_BOOT_CRYPT_CNTunstable
Set this bit to enable SPI boot encrypt/decrypt. Odd number of 1: enable. even number of 1: disable {0: “Disable”; 1: “Enable”; 3: “Disable”; 7: “Enable”}
SPI_DOWNLOAD_MSPI_DISunstable
Set this bit to disable accessing MSPI flash/MSPI ram by SYS AXI matrix during boot_mode_download
TEMPunstable
Operating temperature of the ESP chip
TEMPERATURE_SENSORunstable
Temperature calibration data
UART_PRINT_CONTROLunstable
Set the type of UART printing; 00: force enable printing; 01: enable printing when GPIO8 is reset at low level; 10: enable printing when GPIO8 is reset at high level; 11: force disable printing
USB_DEVICE_EXCHG_PINSunstable
Enable usb device exchange pins of D+ and D-
USB_OTG11_EXCHG_PINSunstable
Enable usb otg11 exchange pins of D+ and D-
USB_PHY_SELunstable
0: intphy(gpio24/25) <—> usb_device 1: intphy(26/27) <—> usb_otg11.1: intphy(gpio26/27) <—> usb_device 1: intphy(24/25) <—> usb_otg11
USER_DATAunstable
[BLOCK_USR_DATA] User data
USER_DATA_MAC_CUSTOMunstable
[MAC_CUSTOM CUSTOM_MAC] Custom MAC
WAFER_VERSION_MAJORunstable
Major chip version (lower 2 bits)
WAFER_VERSION_MINORunstable
Minor chip version
WDT_DELAY_SELunstable
Select lp wdt timeout threshold at startup = initial timeout value * (2 ^ (EFUSE_WDT_DELAY_SEL + 1))
WR_DISunstable
Disable programming of individual eFuses
WR_DIS_ACTIVE_HP_DBIASunstable
wr_dis of ACTIVE_HP_DBIAS
WR_DIS_ACTIVE_LP_DBIASunstable
wr_dis of ACTIVE_LP_DBIAS
WR_DIS_ADC1_AVE_INITCODE_ATTEN0unstable
wr_dis of ADC1_AVE_INITCODE_ATTEN0
WR_DIS_ADC1_AVE_INITCODE_ATTEN1unstable
wr_dis of ADC1_AVE_INITCODE_ATTEN1
WR_DIS_ADC1_AVE_INITCODE_ATTEN2unstable
wr_dis of ADC1_AVE_INITCODE_ATTEN2
WR_DIS_ADC1_AVE_INITCODE_ATTEN3unstable
wr_dis of ADC1_AVE_INITCODE_ATTEN3
WR_DIS_ADC1_CH0_ATTEN0_INITCODE_DIFFunstable
wr_dis of ADC1_CH0_ATTEN0_INITCODE_DIFF
WR_DIS_ADC1_CH1_ATTEN0_INITCODE_DIFFunstable
wr_dis of ADC1_CH1_ATTEN0_INITCODE_DIFF
WR_DIS_ADC1_CH2_ATTEN0_INITCODE_DIFFunstable
wr_dis of ADC1_CH2_ATTEN0_INITCODE_DIFF
WR_DIS_ADC1_CH3_ATTEN0_INITCODE_DIFFunstable
wr_dis of ADC1_CH3_ATTEN0_INITCODE_DIFF
WR_DIS_ADC1_CH4_ATTEN0_INITCODE_DIFFunstable
wr_dis of ADC1_CH4_ATTEN0_INITCODE_DIFF
WR_DIS_ADC1_CH5_ATTEN0_INITCODE_DIFFunstable
wr_dis of ADC1_CH5_ATTEN0_INITCODE_DIFF
WR_DIS_ADC1_CH6_ATTEN0_INITCODE_DIFFunstable
wr_dis of ADC1_CH6_ATTEN0_INITCODE_DIFF
WR_DIS_ADC1_CH7_ATTEN0_INITCODE_DIFFunstable
wr_dis of ADC1_CH7_ATTEN0_INITCODE_DIFF
WR_DIS_ADC1_HI_DOUT_ATTEN0unstable
wr_dis of ADC1_HI_DOUT_ATTEN0
WR_DIS_ADC1_HI_DOUT_ATTEN1unstable
wr_dis of ADC1_HI_DOUT_ATTEN1
WR_DIS_ADC1_HI_DOUT_ATTEN2unstable
wr_dis of ADC1_HI_DOUT_ATTEN2
WR_DIS_ADC1_HI_DOUT_ATTEN3unstable
wr_dis of ADC1_HI_DOUT_ATTEN3
WR_DIS_ADC2_AVE_INITCODE_ATTEN0unstable
wr_dis of ADC2_AVE_INITCODE_ATTEN0
WR_DIS_ADC2_AVE_INITCODE_ATTEN1unstable
wr_dis of ADC2_AVE_INITCODE_ATTEN1
WR_DIS_ADC2_AVE_INITCODE_ATTEN2unstable
wr_dis of ADC2_AVE_INITCODE_ATTEN2
WR_DIS_ADC2_AVE_INITCODE_ATTEN3unstable
wr_dis of ADC2_AVE_INITCODE_ATTEN3
WR_DIS_ADC2_CH0_ATTEN0_INITCODE_DIFFunstable
wr_dis of ADC2_CH0_ATTEN0_INITCODE_DIFF
WR_DIS_ADC2_CH1_ATTEN0_INITCODE_DIFFunstable
wr_dis of ADC2_CH1_ATTEN0_INITCODE_DIFF
WR_DIS_ADC2_CH2_ATTEN0_INITCODE_DIFFunstable
wr_dis of ADC2_CH2_ATTEN0_INITCODE_DIFF
WR_DIS_ADC2_CH3_ATTEN0_INITCODE_DIFFunstable
wr_dis of ADC2_CH3_ATTEN0_INITCODE_DIFF
WR_DIS_ADC2_CH4_ATTEN0_INITCODE_DIFFunstable
wr_dis of ADC2_CH4_ATTEN0_INITCODE_DIFF
WR_DIS_ADC2_CH5_ATTEN0_INITCODE_DIFFunstable
wr_dis of ADC2_CH5_ATTEN0_INITCODE_DIFF
WR_DIS_ADC2_HI_DOUT_ATTEN0unstable
wr_dis of ADC2_HI_DOUT_ATTEN0
WR_DIS_ADC2_HI_DOUT_ATTEN1unstable
wr_dis of ADC2_HI_DOUT_ATTEN1
WR_DIS_ADC2_HI_DOUT_ATTEN2unstable
wr_dis of ADC2_HI_DOUT_ATTEN2
WR_DIS_ADC2_HI_DOUT_ATTEN3unstable
wr_dis of ADC2_HI_DOUT_ATTEN3
WR_DIS_BLK1unstable
wr_dis of BLOCK1
WR_DIS_BLK_VERSION_MAJORunstable
wr_dis of BLK_VERSION_MAJOR
WR_DIS_BLK_VERSION_MINORunstable
wr_dis of BLK_VERSION_MINOR
WR_DIS_BLOCK_KEY0unstable
[WR_DIS.KEY0] wr_dis of BLOCK_KEY0
WR_DIS_BLOCK_KEY1unstable
[WR_DIS.KEY1] wr_dis of BLOCK_KEY1
WR_DIS_BLOCK_KEY2unstable
[WR_DIS.KEY2] wr_dis of BLOCK_KEY2
WR_DIS_BLOCK_KEY3unstable
[WR_DIS.KEY3] wr_dis of BLOCK_KEY3
WR_DIS_BLOCK_KEY4unstable
[WR_DIS.KEY4] wr_dis of BLOCK_KEY4
WR_DIS_BLOCK_KEY5unstable
[WR_DIS.KEY5] wr_dis of BLOCK_KEY5
WR_DIS_BLOCK_SYS_DATA2unstable
[WR_DIS.SYS_DATA_PART2] wr_dis of BLOCK_SYS_DATA2
WR_DIS_BLOCK_USR_DATAunstable
[WR_DIS.USER_DATA] wr_dis of BLOCK_USR_DATA
WR_DIS_CUSTOM_MACunstable
[WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM] wr_dis of CUSTOM_MAC
WR_DIS_DISABLE_BLK_VERSION_MAJORunstable
wr_dis of DISABLE_BLK_VERSION_MAJOR
WR_DIS_DISABLE_WAFER_VERSION_MAJORunstable
wr_dis of DISABLE_WAFER_VERSION_MAJOR
WR_DIS_DIS_DIRECT_BOOTunstable
wr_dis of DIS_DIRECT_BOOT
WR_DIS_DIS_DOWNLOAD_MANUAL_ENCRYPTunstable
wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
WR_DIS_DIS_DOWNLOAD_MODEunstable
wr_dis of DIS_DOWNLOAD_MODE
WR_DIS_DIS_FORCE_DOWNLOADunstable
wr_dis of DIS_FORCE_DOWNLOAD
WR_DIS_DIS_PAD_JTAGunstable
wr_dis of DIS_PAD_JTAG
WR_DIS_DIS_SWDunstable
wr_dis of DIS_SWD
WR_DIS_DIS_TWAIunstable
wr_dis of DIS_TWAI
WR_DIS_DIS_USB_JTAGunstable
wr_dis of DIS_USB_JTAG
WR_DIS_DIS_USB_OTG_DOWNLOAD_MODEunstable
wr_dis of DIS_USB_OTG_DOWNLOAD_MODE
WR_DIS_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODEunstable
wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE
WR_DIS_DIS_USB_SERIAL_JTAG_ROM_PRINTunstable
wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT
WR_DIS_DIS_WDTunstable
wr_dis of DIS_WDT
WR_DIS_DSLP_DBGunstable
wr_dis of DSLP_DBG
WR_DIS_DSLP_LP_DBIASunstable
wr_dis of DSLP_LP_DBIAS
WR_DIS_ECC_FORCE_CONST_TIMEunstable
wr_dis of ECC_FORCE_CONST_TIME
WR_DIS_ENABLE_SECURITY_DOWNLOADunstable
wr_dis of ENABLE_SECURITY_DOWNLOAD
WR_DIS_FLASH_ECC_ENunstable
wr_dis of FLASH_ECC_EN
WR_DIS_FLASH_TPUWunstable
wr_dis of FLASH_TPUW
WR_DIS_FORCE_DISABLE_SW_INIT_KEYunstable
wr_dis of FORCE_DISABLE_SW_INIT_KEY
WR_DIS_FORCE_SEND_RESUMEunstable
wr_dis of FORCE_SEND_RESUME
WR_DIS_FORCE_USE_KEY_MANAGER_KEYunstable
wr_dis of FORCE_USE_KEY_MANAGER_KEY
WR_DIS_FORCE_USE_KEY_MANAGER_KEY_Hunstable
wr_dis of FORCE_USE_KEY_MANAGER_KEY_H
WR_DIS_HP_PWR_SRC_SELunstable
wr_dis of HP_PWR_SRC_SEL
WR_DIS_HUK_GEN_STATEunstable
wr_dis of HUK_GEN_STATE
WR_DIS_HYS_EN_PADunstable
wr_dis of HYS_EN_PAD
WR_DIS_JTAG_SEL_ENABLEunstable
wr_dis of JTAG_SEL_ENABLE
WR_DIS_KEY_PURPOSE_0unstable
[WR_DIS.KEY0_PURPOSE] wr_dis of KEY_PURPOSE_0
WR_DIS_KEY_PURPOSE_0_Hunstable
wr_dis of KEY_PURPOSE_0_H
WR_DIS_KEY_PURPOSE_1unstable
[WR_DIS.KEY1_PURPOSE] wr_dis of KEY_PURPOSE_1
WR_DIS_KEY_PURPOSE_2unstable
[WR_DIS.KEY2_PURPOSE] wr_dis of KEY_PURPOSE_2
WR_DIS_KEY_PURPOSE_3unstable
[WR_DIS.KEY3_PURPOSE] wr_dis of KEY_PURPOSE_3
WR_DIS_KEY_PURPOSE_4unstable
[WR_DIS.KEY4_PURPOSE] wr_dis of KEY_PURPOSE_4
WR_DIS_KEY_PURPOSE_5unstable
[WR_DIS.KEY5_PURPOSE] wr_dis of KEY_PURPOSE_5
WR_DIS_KEY_PURPOSE_1_Hunstable
wr_dis of KEY_PURPOSE_1_H
WR_DIS_KEY_PURPOSE_2_Hunstable
wr_dis of KEY_PURPOSE_2_H
WR_DIS_KEY_PURPOSE_3_Hunstable
wr_dis of KEY_PURPOSE_3_H
WR_DIS_KEY_PURPOSE_4_Hunstable
wr_dis of KEY_PURPOSE_4_H
WR_DIS_KEY_PURPOSE_5_Hunstable
wr_dis of KEY_PURPOSE_5_H
WR_DIS_KM_DEPLOY_ONLY_ONCEunstable
wr_dis of KM_DEPLOY_ONLY_ONCE
WR_DIS_KM_DEPLOY_ONLY_ONCE_Hunstable
wr_dis of KM_DEPLOY_ONLY_ONCE_H
WR_DIS_KM_DISABLE_DEPLOY_MODEunstable
wr_dis of KM_DISABLE_DEPLOY_MODE
WR_DIS_KM_DISABLE_DEPLOY_MODE_Hunstable
wr_dis of KM_DISABLE_DEPLOY_MODE_H
WR_DIS_KM_RND_SWITCH_CYCLEunstable
wr_dis of KM_RND_SWITCH_CYCLE
WR_DIS_KM_XTS_KEY_LENGTH_256unstable
wr_dis of KM_XTS_KEY_LENGTH_256
WR_DIS_LDO_VO1_DREFunstable
wr_dis of LDO_VO1_DREF
WR_DIS_LDO_VO1_MULunstable
wr_dis of LDO_VO1_MUL
WR_DIS_LDO_VO2_DREFunstable
wr_dis of LDO_VO2_DREF
WR_DIS_LDO_VO2_MULunstable
wr_dis of LDO_VO2_MUL
WR_DIS_LDO_VO3_Cunstable
wr_dis of LDO_VO3_C
WR_DIS_LDO_VO3_Kunstable
wr_dis of LDO_VO3_K
WR_DIS_LDO_VO3_VOSunstable
wr_dis of LDO_VO3_VOS
WR_DIS_LDO_VO4_Cunstable
wr_dis of LDO_VO4_C
WR_DIS_LDO_VO4_Kunstable
wr_dis of LDO_VO4_K
WR_DIS_LDO_VO4_VOSunstable
wr_dis of LDO_VO4_VOS
WR_DIS_LOCK_KM_KEYunstable
wr_dis of LOCK_KM_KEY
WR_DIS_LP_DCDC_DBIAS_VOL_GAPunstable
wr_dis of LP_DCDC_DBIAS_VOL_GAP
WR_DIS_MACunstable
[WR_DIS.MAC_FACTORY] wr_dis of MAC
WR_DIS_OPTIONAL_UNIQUE_IDunstable
wr_dis of OPTIONAL_UNIQUE_ID
WR_DIS_PKG_VERSIONunstable
wr_dis of PKG_VERSION
WR_DIS_PSRAM_CAPunstable
wr_dis of PSRAM_CAP
WR_DIS_PSRAM_VENDORunstable
wr_dis of PSRAM_VENDOR
WR_DIS_PVT_40M_BIASunstable
wr_dis of PVT_40M_BIAS
WR_DIS_PVT_100M_BIASunstable
wr_dis of PVT_100M_BIAS
WR_DIS_PVT_400M_BIASunstable
wr_dis of PVT_400M_BIAS
WR_DIS_PVT_GLITCH_ENunstable
wr_dis of PVT_GLITCH_EN
WR_DIS_PVT_GLITCH_MODEunstable
wr_dis of PVT_GLITCH_MODE
WR_DIS_PXA0_TIEH_SEL_0unstable
wr_dis of PXA0_TIEH_SEL_0
WR_DIS_RD_DISunstable
wr_dis of RD_DIS
WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKEunstable
wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
WR_DIS_SECURE_BOOT_DISABLE_FAST_WAKEunstable
wr_dis of SECURE_BOOT_DISABLE_FAST_WAKE
WR_DIS_SECURE_BOOT_ENunstable
wr_dis of SECURE_BOOT_EN
WR_DIS_SECURE_BOOT_KEY_REVOKE0unstable
wr_dis of SECURE_BOOT_KEY_REVOKE0
WR_DIS_SECURE_BOOT_KEY_REVOKE1unstable
wr_dis of SECURE_BOOT_KEY_REVOKE1
WR_DIS_SECURE_BOOT_KEY_REVOKE2unstable
wr_dis of SECURE_BOOT_KEY_REVOKE2
WR_DIS_SECURE_VERSIONunstable
wr_dis of SECURE_VERSION
WR_DIS_SEC_DPA_LEVELunstable
wr_dis of SEC_DPA_LEVEL
WR_DIS_SOFT_DIS_JTAGunstable
wr_dis of SOFT_DIS_JTAG
WR_DIS_SPI_BOOT_CRYPT_CNTunstable
wr_dis of SPI_BOOT_CRYPT_CNT
WR_DIS_SPI_DOWNLOAD_MSPI_DISunstable
wr_dis of SPI_DOWNLOAD_MSPI_DIS
WR_DIS_SYS_DATA_PART1unstable
wr_dis of BLOCK2
WR_DIS_TEMPunstable
wr_dis of TEMP
WR_DIS_TEMPERATURE_SENSORunstable
wr_dis of TEMPERATURE_SENSOR
WR_DIS_UART_PRINT_CONTROLunstable
wr_dis of UART_PRINT_CONTROL
WR_DIS_USB_DEVICE_EXCHG_PINSunstable
wr_dis of USB_DEVICE_EXCHG_PINS
WR_DIS_USB_OTG11_EXCHG_PINSunstable
wr_dis of USB_OTG11_EXCHG_PINS
WR_DIS_WAFER_VERSION_MAJOR_HIunstable
wr_dis of WAFER_VERSION_MAJOR_HI
WR_DIS_WAFER_VERSION_MAJOR_LOunstable
wr_dis of WAFER_VERSION_MAJOR_LO
WR_DIS_WAFER_VERSION_MINORunstable
wr_dis of WAFER_VERSION_MINOR
WR_DIS_WDT_DELAY_SELunstable
wr_dis of WDT_DELAY_SEL
WR_DIS_XTS_DPA_CLK_ENABLEunstable
wr_dis of XTS_DPA_CLK_ENABLE
WR_DIS_XTS_DPA_PSEUDO_LEVELunstable
wr_dis of XTS_DPA_PSEUDO_LEVEL
XTS_DPA_CLK_ENABLEunstable
Sets this bit to enable xts clock anti-dpa attack function
XTS_DPA_PSEUDO_LEVELunstable
Sets this bit to control the xts pseudo-round anti-dpa attack function. 0: controlled by register. 1-3: the higher the value is; the more pseudo-rounds are inserted to the xts-aes calculation

Functions§

base_mac_addressunstable
Returns the base MAC address programmed into eFuse during manufacturing.
block_versionunstable
Get efuse block version
chip_revision
Returns the hardware revision.
flash_encryptionunstable
Get status of SPI boot encryption.
override_mac_addressunstable
Overrides the base MAC address used by [interface_mac_address].
read_bitunstable
Read bit value.
read_field_leunstable
Read field value in a little-endian order
rtc_calib_cal_codeunstable
Get ADC calibration code
rtc_calib_cal_mvunstable
Get ADC calibration reference point voltage
rtc_calib_get_chan_compensunstable
Get the channel specific calibration compensation
rtc_calib_init_codeunstable
Get ADC initial code for specified attenuation from efuse
rtc_calib_versionunstable
Get version of RTC calibration block
rwdt_multiplierunstable
Get the multiplier for the timeout value of the RWDT STAGE 0 register.