Available on crate feature
unstable only.Expand description
§RTC Control Sleep Module
§Overview
The sleep module allows configuring various wakeup sources and setting up
the sleep behavior based on those sources. The supported wakeup sources
include:
GPIOpins - light sleep only- timers
SDIO (Secure Digital Input/Output) - light sleep onlyMAC (Media Access Control)wake - light sleep onlyUART0- light sleep onlyUART1- light sleep onlytouchULP (Ultra-Low Power)wakeBT (Bluetooth) wake- light sleep only
Structs§
- LowPower
- Low-power management.
- RtcConfig
- RTC Configuration.
- RtcInit
Config - Configuration for RTC initialization.
- RtcSleep
Config - Configuration for RTC sleep mode.
- Wrapped
Sleep Config - The sleep configuration, as the entry hook of a wakeup source can see it.
Enums§
- Light
Sleep - The result of a light sleep.
Constants§
- GPIO_
INTR_ DISABLE - Disables GPIO interrupt.
- GPIO_
INTR_ HIGH_ LEVEL - Sets GPIO interrupt to trigger on a high level signal.
- GPIO_
INTR_ LOW_ LEVEL - Sets GPIO interrupt to trigger on a low level signal.
- GPIO_
NUM_ MAX - Maximum number of GPIO pins supported.
- OTHER_
BLOCKS_ POWERUP - Power-up cycles for other hardware blocks.
- OTHER_
BLOCKS_ WAIT - Waits cycles for other hardware blocks to stabilize.
- PIN_
FUNC_ GPIO - Specifies the function configuration for GPIO pins.
- RTC_
CK8M_ ENABLE_ WAIT_ DEFAULT - Default number of cycles required to enable the internal 8 MHz clock.
- RTC_
CNTL_ BIASSLP_ MONITOR_ DEFAULT - Default bias setting for sleep mode in the monitor mode.
- RTC_
CNTL_ BIASSLP_ SLEEP_ DEFAULT - Default bias setting during sleep mode.
- RTC_
CNTL_ BIASSLP_ SLEEP_ ON - Keeps the bias for ultra-low power sleep mode always on.
- RTC_
CNTL_ CK8M_ WAIT_ DEFAULT - Default number of cycles to wait for the internal 8 MHz clock to stabilize.
- RTC_
CNTL_ DBG_ ATTEN_ DEEPSLEEP_ DEFAULT - Default attenuation setting during deep sleep, with maximum voltage drop.
- RTC_
CNTL_ DBG_ ATTEN_ DEEPSLEEP_ NODROP - No attenuation (no voltage drop) during deep sleep.
- RTC_
CNTL_ DBG_ ATTEN_ LIGHTSLEEP_ DEFAULT - Default attenuation setting during light sleep, with a voltage drop.
- RTC_
CNTL_ DBG_ ATTEN_ LIGHTSLEEP_ NODROP - No attenuation (no voltage drop) during light sleep.
- RTC_
CNTL_ DBG_ ATTEN_ MONITOR_ DEFAULT - Default debug attenuation setting for the monitor mode.
- RTC_
CNTL_ DBIAS_ 0V90 - Digital bias voltage level of 0.90V.
- RTC_
CNTL_ DBIAS_ 0V95 - Digital bias voltage level of 0.95V.
- RTC_
CNTL_ DBIAS_ 1V00 - Digital bias voltage level of 1.00V.
- RTC_
CNTL_ DBIAS_ 1V05 - Digital bias voltage level of 1.05V.
- RTC_
CNTL_ DBIAS_ 1V10 - Digital bias voltage level of 1.10V.
- RTC_
CNTL_ DBIAS_ 1V15 - Digital bias voltage level of 1.15V.
- RTC_
CNTL_ DBIAS_ 1V20 - Digital bias voltage level of 1.20V.
- RTC_
CNTL_ DBIAS_ 1V25 - Digital bias voltage level of 1.25V.
- RTC_
CNTL_ DBIAS_ 1V30 - Digital bias voltage level of approximately 1.34V.
- RTC_
CNTL_ DG_ VDD_ DRV_ B_ SLP_ DEFAULT - Default driver bias setting for the digital domain during sleep mode.
- RTC_
CNTL_ MIN_ SLP_ VAL_ MIN - Minimum number of cycles for sleep duration.
- RTC_
CNTL_ PD_ CUR_ MONITOR_ DEFAULT - Default power-down current setting for the monitor mode.
- RTC_
CNTL_ PD_ CUR_ SLEEP_ DEFAULT - Default power-down current setting during sleep mode.
- RTC_
CNTL_ PD_ CUR_ SLEEP_ ON - Keeps the power-down current setting for sleep mode always on.
- RTC_
CNTL_ PLL_ BUF_ WAIT_ DEFAULT - Default number of cycles to wait for the PLL buffer to stabilize.
- RTC_
CNTL_ XTL_ BUF_ WAIT_ DEFAULT - Default number of cycles to wait for the XTL buffer to stabilize.
- SIG_
GPIO_ OUT_ IDX - Index for signaling GPIO output.
Type Aliases§
- Sleep
Entry Hook - Runs at sleep entry, before the sleep configuration reaches hardware.
- Sleep
Exit Hook - Runs after a light sleep.