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Module efuse

Module efuse 

Source
Expand description

§eFuse (one-time programmable configuration)

§Overview

The efuse module provides functionality for reading eFuse data from the chip, allowing access to various chip-specific information such as:

  • MAC address
  • Chip revision

and more. It is useful for retrieving chip-specific configuration and identification data during runtime.

§Examples

§Reading interface MAC addresses

use esp_hal::efuse::{self, InterfaceMacAddress};

let mac = efuse::interface_mac_address(InterfaceMacAddress::Bluetooth);
println!("MAC: {mac}");
println!("MAC bytes: {:02x?}", mac.as_bytes());

Structs§

ChipRevision
Represents the hardware revision.
EfuseFieldunstable
The bit field for get access to efuse data.
MacAddress
Hardware (MAC) address.

Enums§

InterfaceMacAddress
Interface selection for interface_mac_address.
SetMacErrorunstable
Error indicating issues with setting the MAC address.

Constants§

ACTIVE_DCDC_1V25unstable
DCDC-DCDC DBIAS of 1.25v
ACTIVE_DCDC_1V35unstable
DCDC-DCDC DBIAS of 1.35v
ADC1_AVE_INITCODE_ATTEN0unstable
Average initcode of ADC1 atten0
ADC1_AVE_INITCODE_ATTEN1unstable
Average initcode of ADC1 atten1
ADC1_AVE_INITCODE_ATTEN2unstable
Average initcode of ADC1 atten2
ADC1_AVE_INITCODE_ATTEN3unstable
Average initcode of ADC1 atten3
ADC1_CH0_ATTEN0_INITCODE_DIFFunstable
Gap between ADC1 CH0 and average initcode
ADC1_CH1_ATTEN0_INITCODE_DIFFunstable
Gap between ADC1 CH1 and average initcode
ADC1_CH2_ATTEN0_INITCODE_DIFFunstable
Gap between ADC1 CH2 and average initcode
ADC1_CH3_ATTEN0_INITCODE_DIFFunstable
Gap between ADC1 CH3 and average initcode
ADC1_CH4_ATTEN0_INITCODE_DIFFunstable
Gap between ADC1 CH4 and average initcode
ADC1_HI_DOUT_ATTEN0unstable
HI dout of ADC1 atten0
ADC1_HI_DOUT_ATTEN1unstable
HI dout of ADC1 atten1
ADC1_HI_DOUT_ATTEN2unstable
HI dout of ADC1 atten2
ADC1_HI_DOUT_ATTEN3unstable
HI dout of ADC1 atten3
ADJUST_1V2unstable
SPI LDO adjust of 1.2v
ADJUST_1V8unstable
SPI LDO adjust of 1.8v
BLK_VERSION_MAJORunstable
BLK_VERSION_MAJOR of BLOCK2
BLK_VERSION_MINORunstable
BLK_VERSION_MINOR of BLOCK2
BLOCK_KEY0unstable
Key0 or user data
BLOCK_KEY1unstable
Key1 or user data
BLOCK_KEY2unstable
Key2 or user data
BLOCK_KEY3unstable
Key3 or user data
BLOCK_KEY4unstable
Key4 or user data
BLOCK_KEY5unstable
Key5 or user data
BLOCK_SYS_DATA2unstable
System data part 2 (reserved)
BLOCK_USR_DATAunstable
User data
CUSTOM_MACunstable
Custom MAC
DCDC_CCM_ENunstable
Represents whether change DCDC to CCM mode
DCDC_OCODEunstable
DCDC OCode
DISABLE_BLK_VERSION_MAJORunstable
Disables check of blk version major
DISABLE_WAFER_VERSION_MAJORunstable
Disables check of wafer version major
DIS_CORE1unstable
Represents whether the CPU-Core1 is disabled. 1: Disabled. 0: Not disable
DIS_DIRECT_BOOTunstable
Represents whether direct boot mode is disabled or enabled. 1: disabled 0: enabled
DIS_DOWNLOAD_MANUAL_ENCRYPTunstable
Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled 0: enabled
DIS_DOWNLOAD_MODEunstable
Represents whether Download mode is disabled or enabled. 1: disabled 0: enabled
DIS_FORCE_DOWNLOADunstable
Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled 0: enabled
DIS_PAD_JTAGunstable
Represents whether JTAG is disabled in the hard way(permanently). 1: disabled 0: enabled
DIS_TWAIunstable
Represents whether TWAI function is disabled or enabled. 1: disabled 0: enabled
DIS_USB_JTAGunstable
Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled 0: enabled
DIS_USB_SERIAL_JTAGunstable
Represents whether USB-Serial-JTAG is disabled or enabled. 1: disabled 0: enabled
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODEunstable
Represents whether the USB-Serial-JTAG download function is disabled or enabled. 1: Disable 0: Enable
DIS_USB_SERIAL_JTAG_ROM_PRINTunstable
Represents whether print from USB-Serial-JTAG is disabled or enabled. 1: disabled 0: enabled
DSLP_LP_DBIASunstable
LP DBIAS in deep sleep
ECC_FORCE_CONST_TIMEunstable
Represents whether to force ecc to use const-time calculation mode. 1: Enable. 0: Disable
ENABLE_SECURITY_DOWNLOADunstable
Represents whether security download is enabled or disabled. 1: enabled 0: disabled
FLASH_CAPunstable
Flash capacity
FLASH_LDO_EFUSE_SELunstable
Represents whether to select efuse control flash ldo default voltage. 1 : efuse 0 : strapping
FLASH_LDO_POWER_SELunstable
Represents which flash ldo be select: 1: FLASH LDO 1P2 0 : FLASH LDO 1P8
FLASH_TPUWunstable
Represents the flash waiting time after power-up; in unit of ms. When the value less than 15; the waiting time is the programmed value. Otherwise; the waiting time is 2 times the programmed value
FLASH_VENDORunstable
Flash vendor
FORCE_DISABLE_SW_INIT_KEYunstable
Represents whether to disable the use of the initialization key written by software and instead force use efuse_init_key.0: Enable1: Disable
FORCE_SEND_RESUMEunstable
Represents whether ROM code is forced to send a resume command during SPI boot. 1: forced 0:not forced
FORCE_USE_KEY_MANAGER_KEYunstable
Represents whether the corresponding key must come from Key Manager. Bit0: Represents whether the ECDSA key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit1: Represents whether the XTS-AES (flash and PSRAM) key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit2: Represents whether the HMAC key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key ManagerBit3: Represents whether the DS key must come from Key Manager.0: The key does not need to come from Key Manager1: The key must come from Key Manager
HI_DOUT_DIFF_1P8_3P3unstable
HI dout diff between IO LDO 1.8v and 3.3v
HUK_GEN_STATEunstable
Represents whether the HUK generate mode is valid.Odd count of bits with a value of 1: InvalidEven count of bits with a value of 1: Valid
HYS_EN_PADunstable
Represents whether the hysteresis function of corresponding PAD is enabled. 1: enabled 0:disabled
INITCODE_DIFF_1P8_3P3unstable
Initcode diff between IO LDO 1.8v and 3.3v
IO_LDO_1P8unstable
Represents select IO LDO voltage to 1.8V or 3.3V. 1: 1.8V 0: 3.3V
IO_LDO_ADJUSTunstable
Represents configuration of IO LDO mode and voltage.
JTAG_SEL_ENABLEunstable
Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled 0: disabled
KEY_PURPOSE_0unstable
Represents the purpose of Key0
KEY_PURPOSE_1unstable
Represents the purpose of Key1
KEY_PURPOSE_2unstable
Represents the purpose of Key2
KEY_PURPOSE_3unstable
Represents the purpose of Key3
KEY_PURPOSE_4unstable
Represents the purpose of Key4
KEY_PURPOSE_5unstable
Represents the purpose of Key5
KM_DEPLOY_ONLY_ONCEunstable
Represents whether the corresponding key can be deployed only once.Bit0: Represents whether the ECDSA key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit1: Represents whether the XTS-AES (flash and PSRAM) key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit2: Represents whether the HMAC key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only onceBit3: Represents whether the DS key can be deployed only once0: The key can be deployed multiple times1: The key can be deployed only once
KM_DISABLE_DEPLOY_MODEunstable
Represents whether the new key deployment of key manager is disabled. Bit0: Represents whether the new ECDSA key deployment is disabled0: Enabled1: DisabledBit1: Represents whether the new XTS-AES (flash and PSRAM) key deployment is disabled0: Enabled1: DisabledBit2: Represents whether the new HMAC key deployment is disabled0: Enabled1: DisabledBit3: Represents whether the new DS key deployment is disabled0: Enabled1: Disabled
KM_RND_SWITCH_CYCLEunstable
Represents the cycle at which the Key Manager switches random numbers.0: Controlled by the \hyperref[fielddesc:KEYMNGRNDSWITCHCYCLE]{KEYMNG_RND_SWITCH_CYCLE} register. For more information; please refer to Chapter \ref{mod:keymng} \textit{\nameref{mod:keymng}}1: 8 Key Manager clock cycles2: 16 Key Manager clock cycles3: 32 Key Manager clock cycles
KM_XTS_KEY_LENGTH_256unstable
Represents which key flash encryption uses.0: XTS-AES-256 key1: XTS-AES-128 key
LOCK_KM_KEYunstable
Represents whether the keys in the Key Manager are locked after deployment.0: Not locked1: Locked
LSLP_HP_DRVBunstable
HP DRVB in light sleep
MAC0unstable
MAC address
MAC1unstable
MAC address
MAC_EXTunstable
Represents the extended bits of MAC address
OCODEunstable
ADC OCode
OPTIONAL_UNIQUE_IDunstable
Optional unique 128-bit ID
PKG_VERSIONunstable
Package version
PSRAM_CAPunstable
Psram capacity
PSRAM_VENDORunstable
Psram vendor
PUMP_DRVunstable
Use to configure charge pump voltage gain
PVT_CELL_SELECTunstable
Power glitch monitor PVT cell select
PVT_DBIASunstable
PVT DBIAS
PVT_GLITCH_CHARGE_RESETunstable
Represents whether to trigger reset or charge pump when PVT power glitch happened.1:Trigger charge pump. 0:Trigger reset
PVT_GLITCH_ENunstable
Represents whether to enable PVT power glitch monitor function.1:Enable. 0:Disable
PVT_GLITCH_MODEunstable
Use to configure glitch mode
PVT_LIMITunstable
Power glitch monitor threthold
PVT_PUMP_LIMITunstable
Use to configure voltage monitor limit for charge pump
RD_DISunstable
Disable reading from BlOCK4-10
RESERVED_1_186unstable
reserved
RESERVED_2_251unstable
reserved
RESERVED_3_192unstable
reserved
RESERVED_3_248unstable
reserved
RESERVE_0_47unstable
Reserved; it was created by set_missed_fields_in_regs func
RESERVE_0_51unstable
Reserved; it was created by set_missed_fields_in_regs func
RESERVE_0_61unstable
Reserved; it was created by set_missed_fields_in_regs func
RESERVE_0_126unstable
Reserved; it was created by set_missed_fields_in_regs func
RESERVE_0_157unstable
Reserved; it was created by set_missed_fields_in_regs func
RESERVE_0_184unstable
Reserved; it was created by set_missed_fields_in_regs func
RESERVE_1_95unstable
Reserved; it was created by set_missed_fields_in_regs func
RESERVE_1_104unstable
Reserved; it was created by set_missed_fields_in_regs func
SECURE_BOOT_AGGRESSIVE_REVOKEunstable
Represents whether revoking aggressive secure boot is enabled or disabled. 1: enabled. 0: disabled
SECURE_BOOT_ENunstable
Represents whether secure boot is enabled or disabled. 1: enabled 0: disabled
SECURE_BOOT_KEY_REVOKE0unstable
Revoke 1st secure boot key
SECURE_BOOT_KEY_REVOKE1unstable
Revoke 2nd secure boot key
SECURE_BOOT_KEY_REVOKE2unstable
Revoke 3rd secure boot key
SECURE_BOOT_SHA384_ENunstable
Represents if the chip supports Secure Boot using SHA-384
SECURE_VERSIONunstable
Represents the version used by ESP-IDF anti-rollback feature
SEC_DPA_LEVELunstable
Represents the spa secure level by configuring the clock random divide mode
SLP_DCDCunstable
DCDC DBIAS in sleep
SOFT_DIS_JTAGunstable
Represents whether JTAG is disabled in soft way. Odd number: disabled Even number: enabled
SPI_BOOT_CRYPT_CNTunstable
Enables flash encryption when 1 or 3 bits are set and disables otherwise
SPI_DOWNLOAD_MSPI_DISunstable
Represents whether SPI0 controller during boot_mode_download is disabled or enabled. 1: disabled 0: enabled
TEMPunstable
Temp (die embedded inside)
TEMP_CALIBunstable
Temperature calibration data
UART_PRINT_CONTROLunstable
Represents the type of UART printing. 00: force enable printing 01: enable printing when GPIO8 is reset at low level 10: enable printing when GPIO8 is reset at high level 11: force disable printing
USB_DREFHunstable
Represents the single-end input threshold vrefh of USB_SERIAL_JTAG PHY; 1.76 V to 2 V with step of 80 mV
USB_DREFLunstable
Represents the single-end input threshold vrefl of USB_SERIAL_JTAG PHY; 1.76 V to 2 V with step of 80 mV
USB_EXCHG_PINSunstable
Represents whether the D+ and D- pins of USB_SERIAL_JTAG PHY is exchanged. 1: exchanged 0: not exchanged
USB_OTG_FS_DREFHunstable
Represents the single-end input threshold vrefh of USB_OTG_FS PHY; 1.76 V to 2 V with step of 80 mV
USB_OTG_FS_DREFLunstable
Represents the single-end input threshold vrefl of USB_OTG_FS PHY; 1.76 V to 2 V with step of 80 mV
USB_OTG_FS_EXCHG_PINSunstable
Represents whether the D+ and D- pins of USB_OTG_FS PHY is exchanged. 1: exchanged 0: not exchanged
USB_PHY_SELunstable
Represents whether to exchange the USB_SERIAL_JTAG PHY with USB_OTG_FS PHY. 1: exchanged. 0: not exchanged
VDD_3V4_DOUTunstable
ADC dout of vdd 3.4v
VDD_SPI_LDO_ADJUSTunstable
Represents configuration of FLASH LDO mode and voltage.
WAFER_VERSION_MAJORunstable
Major chip version
WAFER_VERSION_MINORunstable
Minor chip version
WDT_DELAY_SELunstable
Represents the threshold level of the RTC watchdog STG0 timeout. 0: Original threshold configuration value of STG0 *2 1: Original threshold configuration value of STG0 *4 2: Original threshold configuration value of STG0 *8 3: Original threshold configuration value of STG0 *16
WR_DISunstable
Disable programming of individual eFuses
XTS_DPA_CLK_ENABLEunstable
Represents whether xts-aes anti-dpa attack clock is enabled. 1. Enable. 0: Disable.
XTS_DPA_PSEUDO_LEVELunstable
Represents the pseudo round level of xts-aes anti-dpa attack. 3: High. 2: Moderate 1. Low 0: Disabled

Functions§

base_mac_addressunstable
Returns the base MAC address programmed into eFuse during manufacturing.
block_versionunstable
Returns the eFuse block version.
chip_revision
Returns the hardware revision.
flash_encryptionunstable
Returns whether SPI boot encryption is enabled.
interface_mac_address
Returns the MAC address for a specific interface, derived from the base MAC.
major_chip_versionunstable
Returns the major hardware revision.
minor_chip_versionunstable
Returns the minor hardware revision.
override_mac_addressunstable
Overrides the base MAC address used by interface_mac_address.
read_bitunstable
Reads bit value.
read_field_leunstable
Reads field value in a little-endian order.
rwdt_multiplierunstable
Returns the multiplier for the timeout value of the RWDT STAGE 0 register.