Available on crate feature
unstable only.Expand description
§RTC Control Sleep Module
§Overview
The sleep module allows configuring various wakeup sources and setting up
the sleep behavior based on those sources. The supported wakeup sources
include:
GPIOpins - light sleep only- timers
SDIO (Secure Digital Input/Output) - light sleep onlyMAC (Media Access Control)wake - light sleep onlyUART0- light sleep onlyUART1- light sleep onlytouchULP (Ultra-Low Power)wakeBT (Bluetooth) wake- light sleep only
Structs§
- LowPower
- Low-power management.
- RtcSleep
Config - Configuration for the RTC sleep behavior.
- Wrapped
Sleep Config - The sleep configuration, as the entry hook of a wakeup source can see it.
Enums§
- Light
Sleep - The result of a light sleep.
Constants§
- DG_
PERI_ POWERUP_ CYCLES - DG peripheral power-up cycles.
- DG_
PERI_ WAIT_ CYCLES - DG peripheral wait cycles.
- DG_
WRAP_ POWERUP_ CYCLES - DG wrap power-up cycles.
- DG_
WRAP_ WAIT_ CYCLES - DG wrap wait cycles.
- OTHER_
BLOCKS_ POWERUP - Power-up setting for other blocks.
- OTHER_
BLOCKS_ WAIT - Waits cycles for other blocks.
- RTC_
CNTL_ CK8M_ WAIT_ DEFAULT - Default wait time for CK8M during startup.
- RTC_
CNTL_ DBG_ ATTEN_ DEEPSLEEP_ DEFAULT - Deep sleep debug attenuation setting for ultra-low power mode.
- RTC_
CNTL_ DBG_ ATTEN_ MONITOR_ DEFAULT - Default monitor debug attenuation value.
- RTC_
CNTL_ DBIAS_ 0V90 - Digital bias setting for 0.90V.
- RTC_
CNTL_ DBIAS_ 0V95 - Digital bias setting for 0.95V.
- RTC_
CNTL_ DBIAS_ 1V00 - Digital bias setting for 1.00V.
- RTC_
CNTL_ DBIAS_ 1V05 - Digital bias setting for 1.05V.
- RTC_
CNTL_ DBIAS_ 1V10 - Digital bias setting for 1.10V.
- RTC_
CNTL_ DBIAS_ 1V15 - Digital bias setting for 1.15V.
- RTC_
CNTL_ DBIAS_ 1V20 - Digital bias setting for 1.20V.
- RTC_
CNTL_ DBIAS_ 1V25 - Digital bias setting for 1.25V.
- RTC_
CNTL_ MIN_ SLP_ VAL_ MIN - Minimum sleep value.
- RTC_
CNTL_ PLL_ BUF_ WAIT_ DEFAULT - Default wait time for PLL buffer during startup.
- RTC_
CNTL_ ULPCP_ TOUCH_ START_ WAIT_ DEFAULT - ULP co-processor touch start wait time default value.
- RTC_
CNTL_ ULPCP_ TOUCH_ START_ WAIT_ IN_ SLEEP - ULP co-processor touch start wait time during sleep, set to maximum.
- RTC_
CNTL_ XTL_ BUF_ WAIT_ DEFAULT - Default wait time for XTL buffer during startup.
- RTC_
MEM_ POWERUP_ CYCLES - RTC memory power-up cycles.
- RTC_
MEM_ WAIT_ CYCLES - RTC memory wait cycles.
- RTC_
POWERUP_ CYCLES - RTC power-up cycles.
- RTC_
WAIT_ CYCLES - RTC wait cycles.
- WIFI_
POWERUP_ CYCLES - WiFi power-up cycles.
- WIFI_
WAIT_ CYCLES - WiFi wait cycles.
Type Aliases§
- Sleep
Entry Hook - Runs at sleep entry, before the sleep configuration reaches hardware.
- Sleep
Exit Hook - Runs after a light sleep.