Module clock 

EMAC clock configuration for ESP32-S31.

RMII reference clock sources

The ESP32-S31 EMAC needs a 50 MHz reference clock for RMII.

• ExternalRefClock — the PHY drives the reference clock into one of the EMAC_RMII_CLK input pads (for example GPIO13). This is the recommended configuration when the PHY has an integrated oscillator.

MII clock source

The PHY drives TX_CLK and RX_CLK separately at 25 MHz (100 Mbps) or 2.5 MHz (10 Mbps). No internal clock generation is required.

RGMII clock sources

RGMII uses PHY-driven RX_CLK. The MAC drives TX_CLK from the MPLL (125 MHz at 1000 Mbps, 25 MHz at 100 Mbps, 2.5 MHz at 10 Mbps).

The TX_CLK divider is an integer, so 1000 Mbps needs the MPLL at 500 MHz. At 400 MHz, the rate that 200 MHz PSRAM needs, RGMII runs at up to 100 Mbps.

Structs

ExternalRefClock

RMII reference clock provided externally by the PHY.