1#[doc = concat!("assert_eq!(chip_name, ", chip!(), ")")]
12#[macro_export]
14#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
15macro_rules! chip {
16 () => {
17 "esp32c2"
18 };
19}
20#[macro_export]
22#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
23macro_rules! property {
24 ("chip") => {
25 "esp32c2"
26 };
27 ("arch") => {
28 "riscv"
29 };
30 ("cores") => {
31 1
32 };
33 ("cores", str) => {
34 stringify!(1)
35 };
36 ("trm") => {
37 "https://www.espressif.com/sites/default/files/documentation/esp8684_technical_reference_manual_en.pdf"
38 };
39 ("soc.cpu_has_csr_pc") => {
40 true
41 };
42 ("soc.cpu_has_prv_mode") => {
43 false
44 };
45 ("soc.rc_fast_clk_default") => {
46 17500000
47 };
48 ("soc.rc_fast_clk_default", str) => {
49 stringify!(17500000)
50 };
51 ("soc.rc_slow_clock") => {
52 136000
53 };
54 ("soc.rc_slow_clock", str) => {
55 stringify!(136000)
56 };
57 ("soc.has_multiple_xtal_options") => {
58 true
59 };
60 ("assist_debug.has_sp_monitor") => {
61 true
62 };
63 ("assist_debug.has_region_monitor") => {
64 false
65 };
66 ("gpio.has_bank_1") => {
67 false
68 };
69 ("gpio.gpio_function") => {
70 1
71 };
72 ("gpio.gpio_function", str) => {
73 stringify!(1)
74 };
75 ("gpio.constant_0_input") => {
76 31
77 };
78 ("gpio.constant_0_input", str) => {
79 stringify!(31)
80 };
81 ("gpio.constant_1_input") => {
82 30
83 };
84 ("gpio.constant_1_input", str) => {
85 stringify!(30)
86 };
87 ("gpio.remap_iomux_pin_registers") => {
88 false
89 };
90 ("gpio.func_in_sel_offset") => {
91 0
92 };
93 ("gpio.func_in_sel_offset", str) => {
94 stringify!(0)
95 };
96 ("gpio.input_signal_max") => {
97 100
98 };
99 ("gpio.input_signal_max", str) => {
100 stringify!(100)
101 };
102 ("gpio.output_signal_max") => {
103 128
104 };
105 ("gpio.output_signal_max", str) => {
106 stringify!(128)
107 };
108 ("i2c_master.has_fsm_timeouts") => {
109 true
110 };
111 ("i2c_master.has_hw_bus_clear") => {
112 true
113 };
114 ("i2c_master.has_bus_timeout_enable") => {
115 true
116 };
117 ("i2c_master.separate_filter_config_registers") => {
118 false
119 };
120 ("i2c_master.can_estimate_nack_reason") => {
121 false
122 };
123 ("i2c_master.has_conf_update") => {
124 true
125 };
126 ("i2c_master.has_reliable_fsm_reset") => {
127 false
128 };
129 ("i2c_master.has_arbitration_en") => {
130 true
131 };
132 ("i2c_master.has_tx_fifo_watermark") => {
133 true
134 };
135 ("i2c_master.bus_timeout_is_exponential") => {
136 true
137 };
138 ("i2c_master.max_bus_timeout") => {
139 31
140 };
141 ("i2c_master.max_bus_timeout", str) => {
142 stringify!(31)
143 };
144 ("i2c_master.ll_intr_mask") => {
145 262143
146 };
147 ("i2c_master.ll_intr_mask", str) => {
148 stringify!(262143)
149 };
150 ("i2c_master.fifo_size") => {
151 16
152 };
153 ("i2c_master.fifo_size", str) => {
154 stringify!(16)
155 };
156 ("interrupts.status_registers") => {
157 2
158 };
159 ("interrupts.status_registers", str) => {
160 stringify!(2)
161 };
162 ("rng.apb_cycle_wait_num") => {
163 16
164 };
165 ("rng.apb_cycle_wait_num", str) => {
166 stringify!(16)
167 };
168 ("sha.dma") => {
169 true
170 };
171 ("spi_master.has_octal") => {
172 false
173 };
174 ("timergroup.timg_has_timer1") => {
175 false
176 };
177 ("timergroup.timg_has_divcnt_rst") => {
178 true
179 };
180 ("timergroup.default_clock_source") => {
181 0
182 };
183 ("timergroup.default_clock_source", str) => {
184 stringify!(0)
185 };
186 ("timergroup.default_wdt_clock_source") => {
187 0
188 };
189 ("timergroup.default_wdt_clock_source", str) => {
190 stringify!(0)
191 };
192 ("uart.ram_size") => {
193 128
194 };
195 ("uart.ram_size", str) => {
196 stringify!(128)
197 };
198 ("uart.peripheral_controls_mem_clk") => {
199 false
200 };
201 ("wifi.has_wifi6") => {
202 false
203 };
204 ("bt.controller") => {
205 "npl"
206 };
207 ("phy.combo_module") => {
208 true
209 };
210}
211#[macro_export]
212#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
213macro_rules! for_each_soc_xtal_options {
214 ($($pattern:tt => $code:tt;)*) => {
215 macro_rules! _for_each_inner { $(($pattern) => $code;)* ($other : tt) => {} }
216 _for_each_inner!((26)); _for_each_inner!((40)); _for_each_inner!((all(26),
217 (40)));
218 };
219}
220#[macro_export]
224#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
225macro_rules! implement_peripheral_clocks {
226 () => {
227 #[doc(hidden)]
228 #[derive(Debug, Clone, Copy, PartialEq, Eq)]
229 #[repr(u8)]
230 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
231 pub enum Peripheral {
232 #[doc = "APB_SAR_ADC peripheral clock signal"]
233 ApbSarAdc,
234 #[doc = "DMA peripheral clock signal"]
235 Dma,
236 #[doc = "ECC peripheral clock signal"]
237 Ecc,
238 #[doc = "I2C_EXT0 peripheral clock signal"]
239 I2cExt0,
240 #[doc = "LEDC peripheral clock signal"]
241 Ledc,
242 #[doc = "SHA peripheral clock signal"]
243 Sha,
244 #[doc = "SPI2 peripheral clock signal"]
245 Spi2,
246 #[doc = "SYSTIMER peripheral clock signal"]
247 Systimer,
248 #[doc = "TIMG0 peripheral clock signal"]
249 Timg0,
250 #[doc = "TSENS peripheral clock signal"]
251 Tsens,
252 #[doc = "UART0 peripheral clock signal"]
253 Uart0,
254 #[doc = "UART1 peripheral clock signal"]
255 Uart1,
256 #[doc = "UART_MEM peripheral clock signal"]
257 UartMem,
258 }
259 impl Peripheral {
260 const KEEP_ENABLED: &[Peripheral] =
261 &[Self::Systimer, Self::Timg0, Self::Uart0, Self::UartMem];
262 const COUNT: usize = Self::ALL.len();
263 const ALL: &[Self] = &[
264 Self::ApbSarAdc,
265 Self::Dma,
266 Self::Ecc,
267 Self::I2cExt0,
268 Self::Ledc,
269 Self::Sha,
270 Self::Spi2,
271 Self::Systimer,
272 Self::Timg0,
273 Self::Tsens,
274 Self::Uart0,
275 Self::Uart1,
276 Self::UartMem,
277 ];
278 }
279 unsafe fn enable_internal_racey(peripheral: Peripheral, enable: bool) {
280 match peripheral {
281 Peripheral::ApbSarAdc => {
282 crate::peripherals::SYSTEM::regs()
283 .perip_clk_en0()
284 .modify(|_, w| w.apb_saradc_clk_en().bit(enable));
285 }
286 Peripheral::Dma => {
287 crate::peripherals::SYSTEM::regs()
288 .perip_clk_en1()
289 .modify(|_, w| w.dma_clk_en().bit(enable));
290 }
291 Peripheral::Ecc => {
292 crate::peripherals::SYSTEM::regs()
293 .perip_clk_en1()
294 .modify(|_, w| w.crypto_ecc_clk_en().bit(enable));
295 }
296 Peripheral::I2cExt0 => {
297 crate::peripherals::SYSTEM::regs()
298 .perip_clk_en0()
299 .modify(|_, w| w.i2c_ext0_clk_en().bit(enable));
300 }
301 Peripheral::Ledc => {
302 crate::peripherals::SYSTEM::regs()
303 .perip_clk_en0()
304 .modify(|_, w| w.ledc_clk_en().bit(enable));
305 }
306 Peripheral::Sha => {
307 crate::peripherals::SYSTEM::regs()
308 .perip_clk_en1()
309 .modify(|_, w| w.crypto_sha_clk_en().bit(enable));
310 }
311 Peripheral::Spi2 => {
312 crate::peripherals::SYSTEM::regs()
313 .perip_clk_en0()
314 .modify(|_, w| w.spi2_clk_en().bit(enable));
315 }
316 Peripheral::Systimer => {
317 crate::peripherals::SYSTEM::regs()
318 .perip_clk_en0()
319 .modify(|_, w| w.systimer_clk_en().bit(enable));
320 }
321 Peripheral::Timg0 => {
322 crate::peripherals::SYSTEM::regs()
323 .perip_clk_en0()
324 .modify(|_, w| w.timergroup_clk_en().bit(enable));
325 }
326 Peripheral::Tsens => {
327 crate::peripherals::SYSTEM::regs()
328 .perip_clk_en1()
329 .modify(|_, w| w.tsens_clk_en().bit(enable));
330 }
331 Peripheral::Uart0 => {
332 crate::peripherals::SYSTEM::regs()
333 .perip_clk_en0()
334 .modify(|_, w| w.uart_clk_en().bit(enable));
335 }
336 Peripheral::Uart1 => {
337 crate::peripherals::SYSTEM::regs()
338 .perip_clk_en0()
339 .modify(|_, w| w.uart1_clk_en().bit(enable));
340 }
341 Peripheral::UartMem => {
342 crate::peripherals::SYSTEM::regs()
343 .perip_clk_en0()
344 .modify(|_, w| w.uart_mem_clk_en().bit(enable));
345 }
346 }
347 }
348 unsafe fn assert_peri_reset_racey(peripheral: Peripheral, reset: bool) {
349 match peripheral {
350 Peripheral::ApbSarAdc => {
351 crate::peripherals::SYSTEM::regs()
352 .perip_rst_en0()
353 .modify(|_, w| w.apb_saradc_rst().bit(reset));
354 }
355 Peripheral::Dma => {
356 crate::peripherals::SYSTEM::regs()
357 .perip_rst_en1()
358 .modify(|_, w| w.dma_rst().bit(reset));
359 }
360 Peripheral::Ecc => {
361 crate::peripherals::SYSTEM::regs()
362 .perip_rst_en1()
363 .modify(|_, w| w.crypto_ecc_rst().bit(reset));
364 }
365 Peripheral::I2cExt0 => {
366 crate::peripherals::SYSTEM::regs()
367 .perip_rst_en0()
368 .modify(|_, w| w.i2c_ext0_rst().bit(reset));
369 }
370 Peripheral::Ledc => {
371 crate::peripherals::SYSTEM::regs()
372 .perip_rst_en0()
373 .modify(|_, w| w.ledc_rst().bit(reset));
374 }
375 Peripheral::Sha => {
376 crate::peripherals::SYSTEM::regs()
377 .perip_rst_en1()
378 .modify(|_, w| w.crypto_sha_rst().bit(reset));
379 }
380 Peripheral::Spi2 => {
381 crate::peripherals::SYSTEM::regs()
382 .perip_rst_en0()
383 .modify(|_, w| w.spi2_rst().bit(reset));
384 }
385 Peripheral::Systimer => {
386 crate::peripherals::SYSTEM::regs()
387 .perip_rst_en0()
388 .modify(|_, w| w.systimer_rst().bit(reset));
389 }
390 Peripheral::Timg0 => {
391 crate::peripherals::SYSTEM::regs()
392 .perip_rst_en0()
393 .modify(|_, w| w.timergroup_rst().bit(reset));
394 }
395 Peripheral::Tsens => {
396 crate::peripherals::SYSTEM::regs()
397 .perip_rst_en1()
398 .modify(|_, w| w.tsens_rst().bit(reset));
399 }
400 Peripheral::Uart0 => {
401 crate::peripherals::SYSTEM::regs()
402 .perip_rst_en0()
403 .modify(|_, w| w.uart_rst().bit(reset));
404 }
405 Peripheral::Uart1 => {
406 crate::peripherals::SYSTEM::regs()
407 .perip_rst_en0()
408 .modify(|_, w| w.uart1_rst().bit(reset));
409 }
410 Peripheral::UartMem => {
411 crate::peripherals::SYSTEM::regs()
412 .perip_rst_en0()
413 .modify(|_, w| w.uart_mem_rst().bit(reset));
414 }
415 }
416 }
417 };
418}
419#[macro_export]
427#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
428macro_rules! memory_range {
429 ("DRAM") => {
430 1070202880..1070465024
431 };
432 (size as str, "DRAM") => {
433 "262144"
434 };
435 ("DRAM2_UNINIT") => {
436 1070393344..1070459760
437 };
438 (size as str, "DRAM2_UNINIT") => {
439 "66416"
440 };
441}
442#[macro_export]
443#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
444macro_rules! for_each_sha_algorithm {
445 ($($pattern:tt => $code:tt;)*) => {
446 macro_rules! _for_each_inner { $(($pattern) => $code;)* ($other : tt) => {} }
447 _for_each_inner!((Sha1, "SHA-1"(sizes : 64, 20, 8) (insecure_against :
448 "collision", "length extension"), 0)); _for_each_inner!((Sha224, "SHA-224"(sizes
449 : 64, 28, 8) (insecure_against : "length extension"), 1));
450 _for_each_inner!((Sha256, "SHA-256"(sizes : 64, 32, 8) (insecure_against :
451 "length extension"), 2)); _for_each_inner!((algos(Sha1, "SHA-1"(sizes : 64, 20,
452 8) (insecure_against : "collision", "length extension"), 0), (Sha224,
453 "SHA-224"(sizes : 64, 28, 8) (insecure_against : "length extension"), 1),
454 (Sha256, "SHA-256"(sizes : 64, 32, 8) (insecure_against : "length extension"),
455 2)));
456 };
457}
458#[macro_export]
475#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
476macro_rules! for_each_i2c_master {
477 ($($pattern:tt => $code:tt;)*) => {
478 macro_rules! _for_each_inner { $(($pattern) => $code;)* ($other : tt) => {} }
479 _for_each_inner!((I2C0, I2cExt0, I2CEXT0_SCL, I2CEXT0_SDA));
480 _for_each_inner!((all(I2C0, I2cExt0, I2CEXT0_SCL, I2CEXT0_SDA)));
481 };
482}
483#[macro_export]
500#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
501macro_rules! for_each_uart {
502 ($($pattern:tt => $code:tt;)*) => {
503 macro_rules! _for_each_inner { $(($pattern) => $code;)* ($other : tt) => {} }
504 _for_each_inner!((UART0, Uart0, U0RXD, U0TXD, U0CTS, U0RTS));
505 _for_each_inner!((UART1, Uart1, U1RXD, U1TXD, U1CTS, U1RTS));
506 _for_each_inner!((all(UART0, Uart0, U0RXD, U0TXD, U0CTS, U0RTS), (UART1, Uart1,
507 U1RXD, U1TXD, U1CTS, U1RTS)));
508 };
509}
510#[macro_export]
532#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
533macro_rules! for_each_spi_master {
534 ($($pattern:tt => $code:tt;)*) => {
535 macro_rules! _for_each_inner { $(($pattern) => $code;)* ($other : tt) => {} }
536 _for_each_inner!((SPI2, Spi2, FSPICLK[FSPICS0, FSPICS1, FSPICS2, FSPICS3,
537 FSPICS4, FSPICS5] [FSPID, FSPIQ, FSPIWP, FSPIHD], true));
538 _for_each_inner!((all(SPI2, Spi2, FSPICLK[FSPICS0, FSPICS1, FSPICS2, FSPICS3,
539 FSPICS4, FSPICS5] [FSPID, FSPIQ, FSPIWP, FSPIHD], true)));
540 };
541}
542#[macro_export]
559#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
560macro_rules! for_each_spi_slave {
561 ($($pattern:tt => $code:tt;)*) => {
562 macro_rules! _for_each_inner { $(($pattern) => $code;)* ($other : tt) => {} }
563 _for_each_inner!((SPI2, Spi2, FSPICLK, FSPID, FSPIQ, FSPICS0));
564 _for_each_inner!((all(SPI2, Spi2, FSPICLK, FSPID, FSPIQ, FSPICS0)));
565 };
566}
567#[macro_export]
568#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
569macro_rules! for_each_peripheral {
570 ($($pattern:tt => $code:tt;)*) => {
571 macro_rules! _for_each_inner { $(($pattern) => $code;)* ($other : tt) => {} }
572 _for_each_inner!((GPIO0 <= virtual())); _for_each_inner!((GPIO1 <= virtual()));
573 _for_each_inner!((GPIO2 <= virtual())); _for_each_inner!((GPIO3 <= virtual()));
574 _for_each_inner!((GPIO4 <= virtual())); _for_each_inner!((GPIO5 <= virtual()));
575 _for_each_inner!((GPIO6 <= virtual())); _for_each_inner!((GPIO7 <= virtual()));
576 _for_each_inner!((GPIO8 <= virtual())); _for_each_inner!((GPIO9 <= virtual()));
577 _for_each_inner!((GPIO10 <= virtual())); _for_each_inner!((GPIO18 <= virtual()));
578 _for_each_inner!((GPIO19 <= virtual())); _for_each_inner!((GPIO20 <= virtual()));
579 _for_each_inner!((APB_CTRL <= APB_CTRL() (unstable)));
580 _for_each_inner!((APB_SARADC <= APB_SARADC() (unstable))); _for_each_inner!((BB
581 <= BB() (unstable))); _for_each_inner!((ASSIST_DEBUG <= ASSIST_DEBUG()
582 (unstable))); _for_each_inner!((DMA <= DMA() (unstable))); _for_each_inner!((ECC
583 <= ECC() (unstable))); _for_each_inner!((EFUSE <= EFUSE() (unstable)));
584 _for_each_inner!((EXTMEM <= EXTMEM() (unstable))); _for_each_inner!((GPIO <=
585 GPIO() (unstable))); _for_each_inner!((I2C_ANA_MST <= I2C_ANA_MST() (unstable)));
586 _for_each_inner!((I2C0 <= I2C0(I2C_EXT0 : { bind_peri_interrupt,
587 enable_peri_interrupt, disable_peri_interrupt })));
588 _for_each_inner!((INTERRUPT_CORE0 <= INTERRUPT_CORE0() (unstable)));
589 _for_each_inner!((IO_MUX <= IO_MUX() (unstable))); _for_each_inner!((LEDC <=
590 LEDC() (unstable))); _for_each_inner!((RNG <= RNG() (unstable)));
591 _for_each_inner!((LPWR <= RTC_CNTL() (unstable))); _for_each_inner!((MODEM_CLKRST
592 <= MODEM_CLKRST() (unstable))); _for_each_inner!((SENSITIVE <= SENSITIVE()
593 (unstable))); _for_each_inner!((SHA <= SHA(SHA : { bind_peri_interrupt,
594 enable_peri_interrupt, disable_peri_interrupt }) (unstable)));
595 _for_each_inner!((SPI0 <= SPI0() (unstable))); _for_each_inner!((SPI1 <= SPI1()
596 (unstable))); _for_each_inner!((SPI2 <= SPI2(SPI2 : { bind_peri_interrupt,
597 enable_peri_interrupt, disable_peri_interrupt }))); _for_each_inner!((SYSTEM <=
598 SYSTEM() (unstable))); _for_each_inner!((SYSTIMER <= SYSTIMER() (unstable)));
599 _for_each_inner!((TIMG0 <= TIMG0() (unstable))); _for_each_inner!((UART0 <=
600 UART0(UART0 : { bind_peri_interrupt, enable_peri_interrupt,
601 disable_peri_interrupt }))); _for_each_inner!((UART1 <= UART1(UART1 : {
602 bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })));
603 _for_each_inner!((XTS_AES <= XTS_AES() (unstable))); _for_each_inner!((DMA_CH0 <=
604 virtual() (unstable))); _for_each_inner!((ADC1 <= virtual() (unstable)));
605 _for_each_inner!((BT <= virtual() (unstable))); _for_each_inner!((FLASH <=
606 virtual() (unstable))); _for_each_inner!((SW_INTERRUPT <= virtual() (unstable)));
607 _for_each_inner!((WIFI <= virtual() (unstable))); _for_each_inner!((MEM2MEM1 <=
608 virtual() (unstable))); _for_each_inner!((MEM2MEM2 <= virtual() (unstable)));
609 _for_each_inner!((MEM2MEM3 <= virtual() (unstable))); _for_each_inner!((MEM2MEM4
610 <= virtual() (unstable))); _for_each_inner!((MEM2MEM5 <= virtual() (unstable)));
611 _for_each_inner!((MEM2MEM6 <= virtual() (unstable))); _for_each_inner!((MEM2MEM7
612 <= virtual() (unstable))); _for_each_inner!((MEM2MEM8 <= virtual() (unstable)));
613 _for_each_inner!((all(GPIO0 <= virtual()), (GPIO1 <= virtual()), (GPIO2 <=
614 virtual()), (GPIO3 <= virtual()), (GPIO4 <= virtual()), (GPIO5 <= virtual()),
615 (GPIO6 <= virtual()), (GPIO7 <= virtual()), (GPIO8 <= virtual()), (GPIO9 <=
616 virtual()), (GPIO10 <= virtual()), (GPIO18 <= virtual()), (GPIO19 <= virtual()),
617 (GPIO20 <= virtual()), (APB_CTRL <= APB_CTRL() (unstable)), (APB_SARADC <=
618 APB_SARADC() (unstable)), (BB <= BB() (unstable)), (ASSIST_DEBUG <=
619 ASSIST_DEBUG() (unstable)), (DMA <= DMA() (unstable)), (ECC <= ECC() (unstable)),
620 (EFUSE <= EFUSE() (unstable)), (EXTMEM <= EXTMEM() (unstable)), (GPIO <= GPIO()
621 (unstable)), (I2C_ANA_MST <= I2C_ANA_MST() (unstable)), (I2C0 <= I2C0(I2C_EXT0 :
622 { bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })),
623 (INTERRUPT_CORE0 <= INTERRUPT_CORE0() (unstable)), (IO_MUX <= IO_MUX()
624 (unstable)), (LEDC <= LEDC() (unstable)), (RNG <= RNG() (unstable)), (LPWR <=
625 RTC_CNTL() (unstable)), (MODEM_CLKRST <= MODEM_CLKRST() (unstable)), (SENSITIVE
626 <= SENSITIVE() (unstable)), (SHA <= SHA(SHA : { bind_peri_interrupt,
627 enable_peri_interrupt, disable_peri_interrupt }) (unstable)), (SPI0 <= SPI0()
628 (unstable)), (SPI1 <= SPI1() (unstable)), (SPI2 <= SPI2(SPI2 : {
629 bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })), (SYSTEM
630 <= SYSTEM() (unstable)), (SYSTIMER <= SYSTIMER() (unstable)), (TIMG0 <= TIMG0()
631 (unstable)), (UART0 <= UART0(UART0 : { bind_peri_interrupt,
632 enable_peri_interrupt, disable_peri_interrupt })), (UART1 <= UART1(UART1 : {
633 bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })), (XTS_AES
634 <= XTS_AES() (unstable)), (DMA_CH0 <= virtual() (unstable)), (ADC1 <= virtual()
635 (unstable)), (BT <= virtual() (unstable)), (FLASH <= virtual() (unstable)),
636 (SW_INTERRUPT <= virtual() (unstable)), (WIFI <= virtual() (unstable)), (MEM2MEM1
637 <= virtual() (unstable)), (MEM2MEM2 <= virtual() (unstable)), (MEM2MEM3 <=
638 virtual() (unstable)), (MEM2MEM4 <= virtual() (unstable)), (MEM2MEM5 <= virtual()
639 (unstable)), (MEM2MEM6 <= virtual() (unstable)), (MEM2MEM7 <= virtual()
640 (unstable)), (MEM2MEM8 <= virtual() (unstable))));
641 };
642}
643#[macro_export]
670#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
671macro_rules! for_each_gpio {
672 ($($pattern:tt => $code:tt;)*) => {
673 macro_rules! _for_each_inner { $(($pattern) => $code;)* ($other : tt) => {} }
674 _for_each_inner!((0, GPIO0() () ([Input] [Output]))); _for_each_inner!((1,
675 GPIO1() () ([Input] [Output]))); _for_each_inner!((2, GPIO2(_2 => FSPIQ) (_2 =>
676 FSPIQ) ([Input] [Output]))); _for_each_inner!((3, GPIO3() () ([Input]
677 [Output]))); _for_each_inner!((4, GPIO4(_0 => MTMS _2 => FSPIHD) (_2 => FSPIHD)
678 ([Input] [Output]))); _for_each_inner!((5, GPIO5(_0 => MTDI _2 => FSPIWP) (_2 =>
679 FSPIWP) ([Input] [Output]))); _for_each_inner!((6, GPIO6(_0 => MTCK _2 =>
680 FSPICLK) (_2 => FSPICLK) ([Input] [Output]))); _for_each_inner!((7, GPIO7(_2 =>
681 FSPID) (_0 => MTDO _2 => FSPID) ([Input] [Output]))); _for_each_inner!((8,
682 GPIO8() () ([Input] [Output]))); _for_each_inner!((9, GPIO9() () ([Input]
683 [Output]))); _for_each_inner!((10, GPIO10() () ([Input] [Output])));
684 _for_each_inner!((18, GPIO18() () ([Input] [Output]))); _for_each_inner!((19,
685 GPIO19(_0 => U0RXD) () ([Input] [Output]))); _for_each_inner!((20, GPIO20() (_0
686 => U0TXD) ([Input] [Output]))); _for_each_inner!((all(0, GPIO0() () ([Input]
687 [Output])), (1, GPIO1() () ([Input] [Output])), (2, GPIO2(_2 => FSPIQ) (_2 =>
688 FSPIQ) ([Input] [Output])), (3, GPIO3() () ([Input] [Output])), (4, GPIO4(_0 =>
689 MTMS _2 => FSPIHD) (_2 => FSPIHD) ([Input] [Output])), (5, GPIO5(_0 => MTDI _2 =>
690 FSPIWP) (_2 => FSPIWP) ([Input] [Output])), (6, GPIO6(_0 => MTCK _2 => FSPICLK)
691 (_2 => FSPICLK) ([Input] [Output])), (7, GPIO7(_2 => FSPID) (_0 => MTDO _2 =>
692 FSPID) ([Input] [Output])), (8, GPIO8() () ([Input] [Output])), (9, GPIO9() ()
693 ([Input] [Output])), (10, GPIO10() () ([Input] [Output])), (18, GPIO18() ()
694 ([Input] [Output])), (19, GPIO19(_0 => U0RXD) () ([Input] [Output])), (20,
695 GPIO20() (_0 => U0TXD) ([Input] [Output]))));
696 };
697}
698#[macro_export]
725#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
726macro_rules! for_each_analog_function {
727 ($($pattern:tt => $code:tt;)*) => {
728 macro_rules! _for_each_inner { $(($pattern) => $code;)* ($other : tt) => {} }
729 _for_each_inner!((ADC1_CH0, GPIO0)); _for_each_inner!((ADC1_CH1, GPIO1));
730 _for_each_inner!((ADC1_CH2, GPIO2)); _for_each_inner!((ADC1_CH3, GPIO3));
731 _for_each_inner!((ADC1_CH4, GPIO4)); _for_each_inner!(((ADC1_CH0, ADCn_CHm, 1,
732 0), GPIO0)); _for_each_inner!(((ADC1_CH1, ADCn_CHm, 1, 1), GPIO1));
733 _for_each_inner!(((ADC1_CH2, ADCn_CHm, 1, 2), GPIO2));
734 _for_each_inner!(((ADC1_CH3, ADCn_CHm, 1, 3), GPIO3));
735 _for_each_inner!(((ADC1_CH4, ADCn_CHm, 1, 4), GPIO4));
736 _for_each_inner!((all(ADC1_CH0, GPIO0), (ADC1_CH1, GPIO1), (ADC1_CH2, GPIO2),
737 (ADC1_CH3, GPIO3), (ADC1_CH4, GPIO4))); _for_each_inner!((all_expanded((ADC1_CH0,
738 ADCn_CHm, 1, 0), GPIO0), ((ADC1_CH1, ADCn_CHm, 1, 1), GPIO1), ((ADC1_CH2,
739 ADCn_CHm, 1, 2), GPIO2), ((ADC1_CH3, ADCn_CHm, 1, 3), GPIO3), ((ADC1_CH4,
740 ADCn_CHm, 1, 4), GPIO4)));
741 };
742}
743#[macro_export]
770#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
771macro_rules! for_each_lp_function {
772 ($($pattern:tt => $code:tt;)*) => {
773 macro_rules! _for_each_inner { $(($pattern) => $code;)* ($other : tt) => {} }
774 _for_each_inner!((RTC_GPIO0, GPIO0)); _for_each_inner!((RTC_GPIO1, GPIO1));
775 _for_each_inner!((RTC_GPIO2, GPIO2)); _for_each_inner!((RTC_GPIO3, GPIO3));
776 _for_each_inner!((RTC_GPIO4, GPIO4)); _for_each_inner!((RTC_GPIO5, GPIO5));
777 _for_each_inner!(((RTC_GPIO0, RTC_GPIOn, 0), GPIO0));
778 _for_each_inner!(((RTC_GPIO1, RTC_GPIOn, 1), GPIO1));
779 _for_each_inner!(((RTC_GPIO2, RTC_GPIOn, 2), GPIO2));
780 _for_each_inner!(((RTC_GPIO3, RTC_GPIOn, 3), GPIO3));
781 _for_each_inner!(((RTC_GPIO4, RTC_GPIOn, 4), GPIO4));
782 _for_each_inner!(((RTC_GPIO5, RTC_GPIOn, 5), GPIO5));
783 _for_each_inner!((all(RTC_GPIO0, GPIO0), (RTC_GPIO1, GPIO1), (RTC_GPIO2, GPIO2),
784 (RTC_GPIO3, GPIO3), (RTC_GPIO4, GPIO4), (RTC_GPIO5, GPIO5)));
785 _for_each_inner!((all_expanded((RTC_GPIO0, RTC_GPIOn, 0), GPIO0), ((RTC_GPIO1,
786 RTC_GPIOn, 1), GPIO1), ((RTC_GPIO2, RTC_GPIOn, 2), GPIO2), ((RTC_GPIO3,
787 RTC_GPIOn, 3), GPIO3), ((RTC_GPIO4, RTC_GPIOn, 4), GPIO4), ((RTC_GPIO5,
788 RTC_GPIOn, 5), GPIO5)));
789 };
790}
791#[macro_export]
795#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
796macro_rules! define_io_mux_signals {
797 () => {
798 #[allow(non_camel_case_types, clippy::upper_case_acronyms)]
799 #[derive(Debug, PartialEq, Copy, Clone)]
800 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
801 #[doc(hidden)]
802 pub enum InputSignal {
803 SPIQ = 0,
804 SPID = 1,
805 SPIHD = 2,
806 SPIWP = 3,
807 U0RXD = 6,
808 U0CTS = 7,
809 U0DSR = 8,
810 U1RXD = 9,
811 U1CTS = 10,
812 U1DSR = 11,
813 CPU_GPIO_0 = 28,
814 CPU_GPIO_1 = 29,
815 CPU_GPIO_2 = 30,
816 CPU_GPIO_3 = 31,
817 CPU_GPIO_4 = 32,
818 CPU_GPIO_5 = 33,
819 CPU_GPIO_6 = 34,
820 CPU_GPIO_7 = 35,
821 EXT_ADC_START = 45,
822 RMT_SIG_0 = 51,
823 RMT_SIG_1 = 52,
824 I2CEXT0_SCL = 53,
825 I2CEXT0_SDA = 54,
826 FSPICLK = 63,
827 FSPIQ = 64,
828 FSPID = 65,
829 FSPIHD = 66,
830 FSPIWP = 67,
831 FSPICS0 = 68,
832 SIG_FUNC_97 = 97,
833 SIG_FUNC_98 = 98,
834 SIG_FUNC_99 = 99,
835 SIG_FUNC_100 = 100,
836 MTCK,
837 MTMS,
838 MTDI,
839 }
840 #[allow(non_camel_case_types, clippy::upper_case_acronyms)]
841 #[derive(Debug, PartialEq, Copy, Clone)]
842 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
843 #[doc(hidden)]
844 pub enum OutputSignal {
845 SPIQ = 0,
846 SPID = 1,
847 SPIHD = 2,
848 SPIWP = 3,
849 SPICLK = 4,
850 SPICS0 = 5,
851 U0TXD = 6,
852 U0RTS = 7,
853 U0DTR = 8,
854 U1TXD = 9,
855 U1RTS = 10,
856 U1DTR = 11,
857 SPIQ_MONITOR = 15,
858 SPID_MONITOR = 16,
859 SPIHD_MONITOR = 17,
860 SPIWP_MONITOR = 18,
861 SPICS1 = 19,
862 CPU_GPIO_0 = 28,
863 CPU_GPIO_1 = 29,
864 CPU_GPIO_2 = 30,
865 CPU_GPIO_3 = 31,
866 CPU_GPIO_4 = 32,
867 CPU_GPIO_5 = 33,
868 CPU_GPIO_6 = 34,
869 CPU_GPIO_7 = 35,
870 LEDC_LS_SIG0 = 45,
871 LEDC_LS_SIG1 = 46,
872 LEDC_LS_SIG2 = 47,
873 LEDC_LS_SIG3 = 48,
874 LEDC_LS_SIG4 = 49,
875 LEDC_LS_SIG5 = 50,
876 RMT_SIG_0 = 51,
877 RMT_SIG_1 = 52,
878 I2CEXT0_SCL = 53,
879 I2CEXT0_SDA = 54,
880 FSPICLK = 63,
881 FSPIQ = 64,
882 FSPID = 65,
883 FSPIHD = 66,
884 FSPIWP = 67,
885 FSPICS0 = 68,
886 FSPICS1 = 69,
887 FSPICS3 = 70,
888 FSPICS2 = 71,
889 FSPICS4 = 72,
890 FSPICS5 = 73,
891 ANT_SEL0 = 89,
892 ANT_SEL1 = 90,
893 ANT_SEL2 = 91,
894 ANT_SEL3 = 92,
895 ANT_SEL4 = 93,
896 ANT_SEL5 = 94,
897 ANT_SEL6 = 95,
898 ANT_SEL7 = 96,
899 SIG_FUNC_97 = 97,
900 SIG_FUNC_98 = 98,
901 SIG_FUNC_99 = 99,
902 SIG_FUNC_100 = 100,
903 CLK_OUT1 = 123,
904 CLK_OUT2 = 124,
905 CLK_OUT3 = 125,
906 GPIO = 128,
907 MTDO,
908 }
909 };
910}
911#[macro_export]
924#[expect(clippy::crate_in_macro_def)]
925#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
926macro_rules! define_io_mux_reg {
927 () => {
928 pub(crate) fn io_mux_reg(gpio_num: u8) -> &'static crate::pac::io_mux::GPIO {
929 crate::peripherals::IO_MUX::regs().gpio(gpio_num as usize)
930 }
931 };
932}