macro_rules! property {
("chip") => { ... };
("arch") => { ... };
("cores") => { ... };
("cores", str) => { ... };
("trm") => { ... };
("gpio.version") => { ... };
("gpio.version", str) => { ... };
("gpio.has_input_sync") => { ... };
("gpio.gpio_function") => { ... };
("gpio.gpio_function", str) => { ... };
("gpio.constant_0_input") => { ... };
("gpio.constant_0_input", str) => { ... };
("gpio.constant_1_input") => { ... };
("gpio.constant_1_input", str) => { ... };
("gpio.remap_iomux_pin_registers") => { ... };
("gpio.func_in_sel_offset") => { ... };
("gpio.func_in_sel_offset", str) => { ... };
("gpio.has_bank_1") => { ... };
("gpio.input_signal_max") => { ... };
("gpio.input_signal_max", str) => { ... };
("gpio.output_signal_max") => { ... };
("gpio.output_signal_max", str) => { ... };
("dedicated_gpio.version") => { ... };
("dedicated_gpio.needs_initialization") => { ... };
("dedicated_gpio.channel_count") => { ... };
("dedicated_gpio.channel_count", str) => { ... };
("lp_io.version") => { ... };
("lp_io.has_gpio_matrix") => { ... };
("uart.ram_size") => { ... };
("uart.ram_size", str) => { ... };
("uart.version") => { ... };
("uart.version", str) => { ... };
("uart.peripheral_controls_mem_clk") => { ... };
("uart.has_sclk_divider") => { ... };
("uart.has_sclk_enable") => { ... };
("uhci.combined_uart_selector_field") => { ... };
("i2c_master.version") => { ... };
("i2c_master.version", str) => { ... };
("i2c_master.has_fsm_timeouts") => { ... };
("i2c_master.has_hw_bus_clear") => { ... };
("i2c_master.has_bus_timeout_enable") => { ... };
("i2c_master.separate_filter_config_registers") => { ... };
("i2c_master.can_estimate_nack_reason") => { ... };
("i2c_master.has_conf_update") => { ... };
("i2c_master.has_reliable_fsm_reset") => { ... };
("i2c_master.has_arbitration_en") => { ... };
("i2c_master.has_tx_fifo_watermark") => { ... };
("i2c_master.bus_timeout_is_exponential") => { ... };
("i2c_master.has_pd_en") => { ... };
("i2c_master.max_bus_timeout") => { ... };
("i2c_master.max_bus_timeout", str) => { ... };
("i2c_master.ll_intr_mask") => { ... };
("i2c_master.ll_intr_mask", str) => { ... };
("i2c_master.fifo_size") => { ... };
("i2c_master.fifo_size", str) => { ... };
("lp_i2c_master.version") => { ... };
("spi_master.version") => { ... };
("spi_master.version", str) => { ... };
("spi_master.fifo_size") => { ... };
("spi_master.fifo_size", str) => { ... };
("spi_master.bit_order_is_bool") => { ... };
("spi_master.has_octal") => { ... };
("spi_master.has_app_interrupts") => { ... };
("spi_master.has_dma_segmented_transfer") => { ... };
("spi_master.has_clk_pre_div") => { ... };
("spi_master.dma_can_access_flash") => { ... };
("i2s.version") => { ... };
("i2s.version", str) => { ... };
("i2s.default_clock_source") => { ... };
("i2s.default_clock_source", str) => { ... };
("i2s.mclk_divider_bit_width") => { ... };
("i2s.mclk_divider_bit_width", str) => { ... };
("i2s.max_ws_width") => { ... };
("i2s.max_ws_width", str) => { ... };
("i2s.clock_configured_by_pcr") => { ... };
("i2s.clock_configured_by_hp_sys_clkrst") => { ... };
("i2s.supports_pdm_rx_hp_filter") => { ... };
("i2s.supports_pdm_tx") => { ... };
("i2s.supports_pdm_rx") => { ... };
("i2s.supports_pcm2pdm") => { ... };
("i2s.supports_pdm2pcm") => { ... };
("rmt.ram_start") => { ... };
("rmt.ram_start", str) => { ... };
("rmt.channel_ram_size") => { ... };
("rmt.channel_ram_size", str) => { ... };
("rmt.has_tx_immediate_stop") => { ... };
("rmt.has_tx_loop_count") => { ... };
("rmt.has_tx_loop_auto_stop") => { ... };
("rmt.has_tx_carrier_data_only") => { ... };
("rmt.has_tx_sync") => { ... };
("rmt.has_rx_wrap") => { ... };
("rmt.has_rx_demodulation") => { ... };
("rmt.has_per_channel_clock") => { ... };
("sdmmc.delay_phase_num") => { ... };
("sdmmc.delay_phase_num", str) => { ... };
("sdmmc.has_iomux") => { ... };
("sdmmc.has_gpio_matrix") => { ... };
("sdmmc.psram_dma") => { ... };
("sdmmc.uhs") => { ... };
("usb_otg.fifo_depth_words") => { ... };
("usb_otg.fifo_depth_words", str) => { ... };
("bt.controller") => { ... };
("wifi.has_wifi6") => { ... };
("wifi.mac_version") => { ... };
("wifi.mac_version", str) => { ... };
("wifi.has_5g") => { ... };
("wifi.csi_supported") => { ... };
("phy.combo_module") => { ... };
("phy.backed_up_digital_register_count") => { ... };
("phy.backed_up_digital_register_count", str) => { ... };
("ledc.version") => { ... };
("ledc.version", str) => { ... };
("ledc.channel_count") => { ... };
("ledc.channel_count", str) => { ... };
("sdm.channel_count") => { ... };
("sdm.channel_count", str) => { ... };
("timergroup.timg_has_timer1") => { ... };
("timergroup.timg_has_divcnt_rst") => { ... };
("aes.has_split_text_registers") => { ... };
("aes.endianness_configurable") => { ... };
("rng.apb_cycle_wait_num") => { ... };
("rng.apb_cycle_wait_num", str) => { ... };
("rng.trng_supported") => { ... };
("rng.is_lp_sys") => { ... };
("rsa.version") => { ... };
("rsa.version", str) => { ... };
("rsa.size_increment") => { ... };
("rsa.size_increment", str) => { ... };
("rsa.memory_size_bytes") => { ... };
("rsa.memory_size_bytes", str) => { ... };
("sleep.light_sleep") => { ... };
("sleep.deep_sleep") => { ... };
("sleep.rejectable_mask") => { ... };
("sleep.ext1_version") => { ... };
("sleep.ext1_version", str) => { ... };
("sleep.pin_wakeup_version") => { ... };
("sleep.pin_wakeup_version", str) => { ... };
("sleep.deep_sleep_needs_gpio_isolation") => { ... };
("assist_debug.has_sp_monitor") => { ... };
("assist_debug.has_region_monitor") => { ... };
("dma.mem2mem_requires_peripheral") => { ... };
("dma.ext_mem_configurable_block_size") => { ... };
("dma.separate_in_out_interrupts") => { ... };
("dma.gdma_version") => { ... };
("dma.gdma_version", str) => { ... };
("interrupts.status_registers") => { ... };
("interrupts.status_registers", str) => { ... };
("mmu.page_size") => { ... };
("mmu.page_size", str) => { ... };
("mmu.entry_num") => { ... };
("mmu.entry_num", str) => { ... };
("psram.octal_spi") => { ... };
("psram.hex_spi") => { ... };
("psram.extmem_origin") => { ... };
("psram.extmem_origin", str) => { ... };
("rom.has_crc_le") => { ... };
("rom.has_crc_be") => { ... };
("rom.has_md5_bsd") => { ... };
("rom.has_md5_mbedtls") => { ... };
("soc.cpu_has_branch_predictor") => { ... };
("soc.cpu_has_csr_pc") => { ... };
("soc.multi_core_enabled") => { ... };
("soc.internal_memory_cached") => { ... };
("soc.has_swd_watchdog") => { ... };
("soc.cpu_mcause_mask") => { ... };
("soc.cpu_mcause_mask", str) => { ... };
("clock_tree.system_pre_div_in") => { ... };
("clock_tree.system_pre_div.divisor") => { ... };
("clock_tree.cpu_clk") => { ... };
("clock_tree.apb_clk") => { ... };
("clock_tree.crypto_pwm_clk") => { ... };
("clock_tree.rc_fast_clk_div_n.divisor") => { ... };
("clock_tree.rtc_slow_clk") => { ... };
("clock_tree.rtc_fast_clk") => { ... };
("clock_tree.low_power_clk") => { ... };
("clock_tree.timg_calibration_clock") => { ... };
("clock_tree.timg.function_clock") => { ... };
("clock_tree.rmt.sclk") => { ... };
("clock_tree.uart.function_clock.sclk") => { ... };
("clock_tree.uart.function_clock.div_num") => { ... };
("clock_tree.uart.baud_rate_generator.fractional") => { ... };
("clock_tree.uart.baud_rate_generator.integral") => { ... };
("clock_tree.i2c.function_clock.sclk") => { ... };
("clock_tree.i2c.function_clock.div_num") => { ... };
("clock_tree.lcd_cam.lcd_clock.sclk") => { ... };
("clock_tree.lcd_cam.lcd_clock.div_num") => { ... };
("clock_tree.lcd_cam.lcd_clock.div_a") => { ... };
("clock_tree.lcd_cam.lcd_clock.div_b") => { ... };
("clock_tree.lcd_cam.cam_clock.sclk") => { ... };
("clock_tree.lcd_cam.cam_clock.div_num") => { ... };
("clock_tree.lcd_cam.cam_clock.div_a") => { ... };
("clock_tree.lcd_cam.cam_clock.div_b") => { ... };
("clock_tree.spi.function_clock") => { ... };
}Available on crate feature
_device-selected only.Expand description
The properties of this chip and its drivers.