1use procmacros::BuilderLite;
2
3use super::*;
4use crate::{
5 ble::InvalidConfigError,
6 hal::{interrupt, peripherals::BT},
7 interrupt_dispatch::Handler,
8 sys::include::esp_bt_controller_config_t,
9};
10
11static ISR_INTERRUPT_4: Handler = Handler::new();
12static ISR_INTERRUPT_7: Handler = Handler::new();
13
14#[derive(Default, Clone, Copy, Eq, PartialEq)]
16#[cfg_attr(feature = "defmt", derive(defmt::Format))]
17pub enum TxPower {
18 N24,
20 N21,
22 N18,
24 N15,
26 N12,
28 N9,
30 N6,
32 N3,
34 N0,
36 P3,
38 P6,
40 #[default]
42 P9,
43 P12,
45 P15,
47 P18,
49 P20,
51}
52
53#[allow(dead_code)]
54impl TxPower {
55 fn idx(self) -> esp_power_level_t {
56 match self {
57 Self::N24 => esp_power_level_t_ESP_PWR_LVL_N24,
58 Self::N21 => esp_power_level_t_ESP_PWR_LVL_N21,
59 Self::N18 => esp_power_level_t_ESP_PWR_LVL_N18,
60 Self::N15 => esp_power_level_t_ESP_PWR_LVL_N15,
61 Self::N12 => esp_power_level_t_ESP_PWR_LVL_N12,
62 Self::N9 => esp_power_level_t_ESP_PWR_LVL_N9,
63 Self::N6 => esp_power_level_t_ESP_PWR_LVL_N6,
64 Self::N3 => esp_power_level_t_ESP_PWR_LVL_N3,
65 Self::N0 => esp_power_level_t_ESP_PWR_LVL_N0,
66 Self::P3 => esp_power_level_t_ESP_PWR_LVL_P3,
67 Self::P6 => esp_power_level_t_ESP_PWR_LVL_P6,
68 Self::P9 => esp_power_level_t_ESP_PWR_LVL_P9,
69 Self::P12 => esp_power_level_t_ESP_PWR_LVL_P12,
70 Self::P15 => esp_power_level_t_ESP_PWR_LVL_P15,
71 Self::P18 => esp_power_level_t_ESP_PWR_LVL_P18,
72 Self::P20 => esp_power_level_t_ESP_PWR_LVL_P20,
73 }
74 }
75
76 fn dbm(self) -> i8 {
77 match self {
78 Self::N24 => -24,
79 Self::N21 => -21,
80 Self::N18 => -18,
81 Self::N15 => -15,
82 Self::N12 => -12,
83 Self::N9 => -9,
84 Self::N6 => -6,
85 Self::N3 => -3,
86 Self::N0 => 0,
87 Self::P3 => 3,
88 Self::P6 => 6,
89 Self::P9 => 9,
90 Self::P12 => 12,
91 Self::P15 => 15,
92 Self::P18 => 18,
93 Self::P20 => 20,
94 }
95 }
96}
97
98#[derive(BuilderLite, Clone, Copy, Eq, PartialEq)]
100#[cfg_attr(feature = "defmt", derive(defmt::Format))]
101pub struct Config {
102 task_priority: u8,
104
105 task_stack_size: u16,
107
108 max_connections: u16,
112
113 qa_test_mode: bool,
115
116 bqb_test: bool,
118
119 ll_resolv_list_size: u16,
121
122 ll_sync_list_cnt: u8,
126
127 ll_sync_cnt: u8,
131
132 ll_rsp_dup_list_count: u16,
136
137 ll_adv_dup_list_count: u16,
141
142 default_tx_power: TxPower,
144
145 hci_high_buffer_count: u16,
147
148 hci_low_buffer_count: u16,
150
151 whitelist_size: u8,
153
154 acl_buf_size: u16,
156
157 acl_buf_count: u16,
159
160 hci_evt_buf_size: u16,
162
163 multi_adv_instances: u16,
165
166 ext_adv_max_size: u16,
170
171 dis_scan_backoff: bool,
173
174 scan_backoff_max: u16,
180
181 verify_access_address: bool,
188
189 cca: bool,
191
192 cca_threshold: u8,
201
202 disconnect_llcp_conn_update: bool,
204
205 disconnect_llcp_chan_map_update: bool,
207
208 disconnect_llcp_phy_update: bool,
210}
211
212impl Default for Config {
213 fn default() -> Self {
214 Self {
215 task_priority: crate::preempt::max_task_priority()
216 .saturating_sub(2)
217 .min(255) as u8,
218 task_stack_size: CONFIG_BT_LE_CONTROLLER_TASK_STACK_SIZE as _,
219 max_connections: CONFIG_BT_LE_MAX_CONNECTIONS as _,
220 qa_test_mode: false,
221 bqb_test: false,
222 ll_resolv_list_size: CONFIG_BT_LE_LL_RESOLV_LIST_SIZE as _,
223 ll_sync_list_cnt: CONFIG_BT_LE_MAX_PERIODIC_ADVERTISER_LIST as _,
224 ll_sync_cnt: CONFIG_BT_LE_MAX_PERIODIC_SYNCS as _,
225 ll_rsp_dup_list_count: CONFIG_BT_LE_LL_DUP_SCAN_LIST_COUNT as _,
226 ll_adv_dup_list_count: CONFIG_BT_LE_LL_DUP_SCAN_LIST_COUNT as _,
227 default_tx_power: TxPower::default(),
228 hci_high_buffer_count: CONFIG_BT_LE_HCI_EVT_HI_BUF_COUNT as _,
229 hci_low_buffer_count: CONFIG_BT_LE_HCI_EVT_LO_BUF_COUNT as _,
230 whitelist_size: CONFIG_BT_LE_WHITELIST_SIZE as _,
231 acl_buf_size: CONFIG_BT_LE_ACL_BUF_SIZE as _,
232 acl_buf_count: CONFIG_BT_LE_ACL_BUF_COUNT as _,
233 hci_evt_buf_size: CONFIG_BT_LE_HCI_EVT_BUF_SIZE as _,
234 multi_adv_instances: CONFIG_BT_LE_MAX_EXT_ADV_INSTANCES as _,
235 ext_adv_max_size: CONFIG_BT_LE_EXT_ADV_MAX_SIZE as _,
236 dis_scan_backoff: false,
237 scan_backoff_max: CONFIG_BT_CTRL_SCAN_BACKOFF_UPPERLIMITMAX as _,
238 verify_access_address: false,
239 disconnect_llcp_conn_update: false,
240 disconnect_llcp_chan_map_update: false,
241 disconnect_llcp_phy_update: false,
242 cca_threshold: 65,
243 cca: false,
244 }
245 }
246}
247
248impl Config {
249 pub(crate) fn validate(&self) -> Result<(), InvalidConfigError> {
250 crate::ble::validate_range!(
251 self,
252 task_priority,
253 0,
254 crate::preempt::max_task_priority().min(255) as u8
255 );
256 crate::ble::validate_range!(self, max_connections, 1, 2);
257 crate::ble::validate_range!(self, ll_sync_cnt, 0, 3);
258 crate::ble::validate_range!(self, ll_sync_list_cnt, 1, 5);
259 crate::ble::validate_range!(self, ll_rsp_dup_list_count, 1, 100);
260 crate::ble::validate_range!(self, ll_adv_dup_list_count, 1, 100);
261 crate::ble::validate_range!(self, whitelist_size, 1, 31);
262 crate::ble::validate_range!(self, multi_adv_instances, 0, 4);
263 crate::ble::validate_range!(self, ext_adv_max_size, 0, 1650);
264 crate::ble::validate_range!(self, scan_backoff_max, 1, 256);
265 crate::ble::validate_range!(self, cca_threshold, 20, 100);
266 Ok(())
267 }
268}
269
270pub(crate) fn create_ble_config(config: &Config) -> esp_bt_controller_config_t {
271 let main_xtal_freq = esp_hal::clock::xtal_clock().as_mhz() as u8;
272
273 let rtc_freq = if main_xtal_freq == 26 { 40000 } else { 32000 };
274
275 esp_bt_controller_config_t {
278 config_version: CONFIG_VERSION,
279 ble_ll_resolv_list_size: config.ll_resolv_list_size,
280 ble_hci_evt_hi_buf_count: config.hci_high_buffer_count,
281 ble_hci_evt_lo_buf_count: config.hci_low_buffer_count,
282 ble_ll_sync_list_cnt: config.ll_sync_list_cnt,
283 ble_ll_sync_cnt: config.ll_sync_cnt,
284 ble_ll_rsp_dup_list_count: config.ll_rsp_dup_list_count,
285 ble_ll_adv_dup_list_count: config.ll_adv_dup_list_count,
286 ble_ll_tx_pwr_dbm: config.default_tx_power.dbm() as u8,
287 rtc_freq,
288 ble_ll_sca: CONFIG_BT_LE_LL_SCA as _,
289 ble_ll_scan_phy_number: if CONFIG_BT_LE_LL_CFG_FEAT_LE_CODED_PHY != 0 {
290 2
291 } else {
292 1
293 },
294 ble_ll_conn_def_auth_pyld_tmo: 3000,
295 ble_ll_jitter_usecs: 16,
296 ble_ll_sched_max_adv_pdu_usecs: 376,
297 ble_ll_sched_direct_adv_max_usecs: 502,
298 ble_ll_sched_adv_max_usecs: 852,
299 ble_scan_rsp_data_max_len: 31,
300 ble_ll_cfg_num_hci_cmd_pkts: 1,
301 ble_ll_ctrl_proc_timeout_ms: 40000,
302 nimble_max_connections: config.max_connections,
303 ble_whitelist_size: config.whitelist_size,
304 ble_acl_buf_size: config.acl_buf_size,
305 ble_acl_buf_count: config.acl_buf_count,
306 ble_hci_evt_buf_size: config.hci_evt_buf_size,
307 ble_multi_adv_instances: config.multi_adv_instances,
308 ble_ext_adv_max_size: config.ext_adv_max_size,
309 controller_task_stack_size: config.task_stack_size,
310 controller_task_prio: config.task_priority,
311 controller_run_cpu: 0,
312 enable_qa_test: config.qa_test_mode as u8,
313 enable_bqb_test: config.bqb_test as u8,
314 enable_uart_hci: 0,
315 ble_hci_uart_port: 0,
316 ble_hci_uart_baud: 0,
317 ble_hci_uart_data_bits: 0,
318 ble_hci_uart_stop_bits: 0,
319 ble_hci_uart_flow_ctrl: 0,
320 ble_hci_uart_uart_parity: 0,
321 enable_tx_cca: config.cca as u8,
322 cca_rssi_thresh: (256 - config.cca_threshold as u32) as u8,
323 sleep_en: 0, coex_phy_coded_tx_rx_time_limit: CONFIG_BT_LE_COEX_PHY_CODED_TX_RX_TLIM_EFF as _,
325 dis_scan_backoff: config.dis_scan_backoff as u8,
326 ble_scan_classify_filter_enable: 0,
327 cca_drop_mode: 0, cca_low_tx_pwr: 0, main_xtal_freq,
330 version_num: crate::hal::efuse::minor_chip_version(),
331 ignore_wl_for_direct_adv: 0,
332 csa2_select: CONFIG_BT_LE_50_FEATURE_SUPPORT as _,
333 ble_aa_check: config.verify_access_address as u8,
334 ble_llcp_disc_flag: config.disconnect_llcp_conn_update as u8
335 | ((config.disconnect_llcp_chan_map_update as u8) << 1)
336 | ((config.disconnect_llcp_phy_update as u8) << 2),
337 scan_backoff_upperlimitmax: config.scan_backoff_max,
338 vhci_enabled: CONFIG_BT_LE_HCI_INTERFACE_USE_RAM as _,
339 config_magic: CONFIG_MAGIC,
340 }
341}
342
343pub(crate) fn bt_periph_module_enable() {
344 }
346
347pub(crate) fn disable_sleep_mode() {
348 }
350
351pub(super) unsafe extern "C" fn esp_intr_alloc(
352 source: u32,
353 flags: u32,
354 handler: *mut c_void,
355 arg: *mut c_void,
356 ret_handle: *mut *mut c_void,
357) -> i32 {
358 trace!(
359 "esp_intr_alloc {} {} {:?} {:?} {:?}",
360 source, flags, handler, arg, ret_handle
361 );
362
363 match source {
364 4 => unsafe {
365 ISR_INTERRUPT_4.set(handler, arg);
366 BT::steal().enable_mac_interrupt(interrupt::Priority::Priority1);
367 },
368 7 => unsafe {
369 ISR_INTERRUPT_7.set(handler, arg);
370 BT::steal().enable_lp_timer_interrupt(interrupt::Priority::Priority1);
371 },
372 _ => panic!("Unexpected interrupt source {}", source),
373 }
374
375 0
376}
377
378pub(super) fn ble_rtc_clk_init() {
379 crate::radio_clocks::clocks_ll::ble_rtc_clk_init();
380}
381
382pub(super) unsafe extern "C" fn esp_reset_rpa_moudle() {
383 trace!("esp_reset_rpa_moudle");
384 crate::radio_clocks::clocks_ll::reset_rpa();
385}
386
387#[unsafe(no_mangle)]
389unsafe fn g_ble_lll_rfmgmt_env_p() -> *mut c_void {
390 unreachable!()
392}
393
394pub(crate) fn shutdown_ble_isr() {
395 unsafe {
396 BT::steal().disable_lp_timer_interrupt_on_all_cores();
397 BT::steal().disable_mac_interrupt_on_all_cores();
398 }
399}
400
401#[unsafe(no_mangle)]
402#[crate::hal::ram]
403extern "C" fn LP_TIMER() {
404 ISR_INTERRUPT_7.dispatch();
405}
406
407#[unsafe(no_mangle)]
408#[crate::hal::ram]
409extern "C" fn BT_MAC() {
410 ISR_INTERRUPT_4.dispatch();
411}