xtensa_lx/
lib.rs

1//! Low-level access to Xtensa LX processors and peripherals.
2//!
3//! ## Feature Flags
4#![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
5#![allow(asm_sub_register)]
6#![feature(asm_experimental_arch)]
7#![no_std]
8
9use core::arch::asm;
10
11pub mod interrupt;
12pub mod timer;
13
14#[macro_use]
15mod macros;
16
17const DCR_ENABLEOCD: u32 = 0x01;
18const XDM_OCD_DCR_SET: u32 = 0x10200C;
19
20/// Move the vector base
21///
22/// # Safety
23///
24/// *This is highly unsafe!*
25/// It should be used with care, `base` MUST be a valid pointer
26#[inline(always)]
27pub unsafe fn set_vecbase(base: *const u32) {
28    unsafe {
29        asm!("wsr.vecbase {0}", in(reg) base, options(nostack));
30    }
31}
32
33/// Get the core stack pointer
34#[inline(always)]
35pub fn get_stack_pointer() -> *const u32 {
36    let x: *const u32;
37    unsafe { asm!("mov {0}, sp", out(reg) x, options(nostack)) };
38    x
39}
40
41/// Set the core stack pointer
42///
43/// `stack` pointer to the non-inclusive end of the stack (must be 16-byte
44/// aligned)
45///
46/// # Safety
47///
48/// *This is highly unsafe!*
49/// It should be used with care at e.g. program start or when building a task
50/// scheduler
51#[inline(always)]
52pub unsafe fn set_stack_pointer(stack: *mut u32) {
53    unsafe {
54        // FIXME: this function relies on it getting inlined - if it doesn't inline it
55        // will try and return from this function using the adress in `a0` which has
56        // just been trashed... According to https://nnethercote.github.io/perf-book/inlining.html:
57        // "Inline attributes do not guarantee that a function is inlined or not
58        // inlined, but in practice, #[inline(always)] will cause inlining in all but
59        // the most exceptional cases." Is this good enough? Should we rewrite these
60        // as a macro to guarentee inlining?
61
62        // NOTE: modification of the `sp` & `a0` is not typically allowed inside inline
63        // asm!, but because we *need* to modify it we can do so by ommiting it from
64        // the clobber
65        asm!(
66            "movi a0, 0", // trash return register
67            "mov sp, {0}", // move stack pointer
68            in(reg) stack, options(nostack)
69        );
70    }
71}
72
73/// Get the core current program counter
74#[inline(always)]
75pub fn get_program_counter() -> *const u32 {
76    let x: *const u32;
77    unsafe {
78        asm!("
79            mov {1}, {2}
80            call0 2f
81            .align 4
82            2:
83            mov {0}, {2}
84            mov {2}, {1}
85            ", out(reg) x, out(reg) _, out(reg) _, options(nostack))
86    };
87    x
88}
89
90/// Get the id of the current core
91#[inline(always)]
92pub fn get_processor_id() -> u32 {
93    let mut x: u32;
94    unsafe { asm!("rsr.prid {0}", out(reg) x, options(nostack)) };
95    x
96}
97
98/// Returns true if a debugger is attached
99#[inline(always)]
100pub fn is_debugger_attached() -> bool {
101    let mut x: u32;
102    unsafe { asm!("rer {0}, {1}", out(reg) x, in(reg) XDM_OCD_DCR_SET, options(nostack)) };
103    (x & DCR_ENABLEOCD) != 0
104}
105
106/// Insert debug breakpoint
107#[inline(always)]
108pub fn debug_break() {
109    unsafe { asm!("break 1, 15", options(nostack)) };
110}
111
112/// Used to reexport items for use in macros. Do not use directly.
113/// Not covered by semver guarantees.
114#[doc(hidden)]
115pub mod _export {
116    pub use critical_section;
117}
xtensa_lx/lib.rs

xtensa_lx/
lib.rs
