xtensa_lx/
lib.rs

1//! Low-level access to Xtensa LX processors and peripherals.
2#![doc(html_logo_url = "https://docs.espressif.com/projects/rust/esp-rs-grey-bg.svg")]
3#![allow(asm_sub_register)]
4#![feature(asm_experimental_arch)]
5#![no_std]
6
7use core::arch::asm;
8
9pub mod interrupt;
10pub mod timer;
11
12#[macro_use]
13mod macros;
14
15const DCR_ENABLEOCD: u32 = 0x01;
16const XDM_OCD_DCR_SET: u32 = 0x10200C;
17
18/// Move the vector base
19///
20/// # Safety
21///
22/// *This is highly unsafe!*
23/// It should be used with care, `base` MUST be a valid pointer
24#[inline(always)]
25pub unsafe fn set_vecbase(base: *const u32) {
26    unsafe {
27        asm!("wsr.vecbase {0}", in(reg) base, options(nostack));
28    }
29}
30
31/// Get the core stack pointer
32#[inline(always)]
33pub fn get_stack_pointer() -> *const u32 {
34    let x: *const u32;
35    unsafe { asm!("mov {0}, sp", out(reg) x, options(nostack)) };
36    x
37}
38
39/// Set the core stack pointer
40///
41/// `stack` pointer to the non-inclusive end of the stack (must be 16-byte
42/// aligned)
43///
44/// # Safety
45///
46/// *This is highly unsafe!*
47/// It should be used with care at e.g. program start or when building a task
48/// scheduler
49#[inline(always)]
50pub unsafe fn set_stack_pointer(stack: *mut u32) {
51    unsafe {
52        // FIXME: this function relies on it getting inlined - if it doesn't inline it
53        // will try and return from this function using the address in `a0` which has
54        // just been trashed... According to https://nnethercote.github.io/perf-book/inlining.html:
55        // "Inline attributes do not guarantee that a function is inlined or not
56        // inlined, but in practice, #[inline(always)] will cause inlining in all but
57        // the most exceptional cases." Is this good enough? Should we rewrite these
58        // as a macro to guarantee inlining?
59
60        // NOTE: modification of the `sp` & `a0` is not typically allowed inside inline
61        // asm!, but because we *need* to modify it we can do so by omitting it from
62        // the clobber
63        asm!(
64            "movi a0, 0", // trash return register
65            "mov sp, {0}", // move stack pointer
66            in(reg) stack, options(nostack)
67        );
68    }
69}
70
71/// Get the core current program counter
72#[inline(always)]
73pub fn get_program_counter() -> *const u32 {
74    let x: *const u32;
75    unsafe {
76        asm!("
77            mov {1}, {2}
78            call0 2f
79            .align 4
80            2:
81            mov {0}, {2}
82            mov {2}, {1}
83            ", out(reg) x, out(reg) _, out(reg) _, options(nostack))
84    };
85    x
86}
87
88/// Get the id of the current core
89#[inline(always)]
90pub fn get_processor_id() -> u32 {
91    let mut x: u32;
92    unsafe { asm!("rsr.prid {0}", out(reg) x, options(nostack)) };
93    x
94}
95
96/// Returns true if a debugger is attached
97#[inline(always)]
98pub fn is_debugger_attached() -> bool {
99    let mut x: u32;
100    unsafe { asm!("rer {0}, {1}", out(reg) x, in(reg) XDM_OCD_DCR_SET, options(nostack)) };
101    (x & DCR_ENABLEOCD) != 0
102}
103
104/// Insert debug breakpoint
105#[inline(always)]
106pub fn debug_break() {
107    unsafe { asm!("break 1, 15", options(nostack)) };
108}
109
110/// Used to reexport items for use in macros. Do not use directly.
111/// Not covered by semver guarantees.
112#[doc(hidden)]
113pub mod _export {
114    pub use critical_section;
115}
xtensa_lx/lib.rs

xtensa_lx/
lib.rs
