SoC Capabilities
This section lists definitions of the ESP32-S3’s SoC hardware capabilities. These definitions are commonly used in IDF to control which hardware dependent features are supported and thus compiled into the binary.
Note
These defines are currently not considered to be part of the public API, and may be changed at any time.
API Reference
Header File
Macros
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SOC_ADC_SUPPORTED
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SOC_PCNT_SUPPORTED
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SOC_WIFI_SUPPORTED
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SOC_TWAI_SUPPORTED
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SOC_GDMA_SUPPORTED
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SOC_LCDCAM_SUPPORTED
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SOC_MCPWM_SUPPORTED
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SOC_DEDICATED_GPIO_SUPPORTED
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SOC_CACHE_SUPPORT_WRAP
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SOC_ULP_SUPPORTED
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SOC_RISCV_COPROC_SUPPORTED
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SOC_BT_SUPPORTED
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SOC_USB_OTG_SUPPORTED
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SOC_USB_SERIAL_JTAG_SUPPORTED
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SOC_CCOMP_TIMER_SUPPORTED
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SOC_ASYNC_MEMCPY_SUPPORTED
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SOC_SUPPORTS_SECURE_DL_MODE
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SOC_EFUSE_KEY_PURPOSE_FIELD
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SOC_SDMMC_HOST_SUPPORTED
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SOC_RTC_FAST_MEM_SUPPORTED
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SOC_RTC_SLOW_MEM_SUPPORTED
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SOC_RTC_MEM_SUPPORTED
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SOC_PSRAM_DMA_CAPABLE
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SOC_XT_WDT_SUPPORTED
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SOC_I2S_SUPPORTED
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SOC_RMT_SUPPORTED
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SOC_SDM_SUPPORTED
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SOC_SYSTIMER_SUPPORTED
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SOC_SUPPORT_COEXISTENCE
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SOC_TEMP_SENSOR_SUPPORTED
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SOC_AES_SUPPORTED
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SOC_MPI_SUPPORTED
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SOC_SHA_SUPPORTED
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SOC_HMAC_SUPPORTED
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SOC_DIG_SIGN_SUPPORTED
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SOC_FLASH_ENC_SUPPORTED
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SOC_SECURE_BOOT_SUPPORTED
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SOC_MEMPROT_SUPPORTED
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SOC_TOUCH_SENSOR_SUPPORTED
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SOC_XTAL_SUPPORT_40M
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SOC_APPCPU_HAS_CLOCK_GATING_BUG
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SOC_ADC_RTC_CTRL_SUPPORTED
< SAR ADC Module
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SOC_ADC_DIG_CTRL_SUPPORTED
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SOC_ADC_ARBITER_SUPPORTED
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SOC_ADC_FILTER_SUPPORTED
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SOC_ADC_MONITOR_SUPPORTED
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SOC_ADC_DMA_SUPPORTED
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SOC_ADC_DIG_SUPPORTED_UNIT(UNIT)
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SOC_ADC_PERIPH_NUM
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SOC_ADC_CHANNEL_NUM(PERIPH_NUM)
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SOC_ADC_MAX_CHANNEL_NUM
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SOC_ADC_ATTEN_NUM
Digital
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SOC_ADC_DIGI_CONTROLLER_NUM
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SOC_ADC_PATT_LEN_MAX
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SOC_ADC_DIGI_MIN_BITWIDTH
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SOC_ADC_DIGI_MAX_BITWIDTH
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SOC_ADC_DIGI_RESULT_BYTES
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SOC_ADC_DIGI_DATA_BYTES_PER_CONV
F_sample = F_digi_con / 2 / interval. F_digi_con = 5M for now. 30 <= interva <= 4095
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SOC_ADC_SAMPLE_FREQ_THRES_HIGH
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SOC_ADC_SAMPLE_FREQ_THRES_LOW
RTC
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SOC_ADC_RTC_MIN_BITWIDTH
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SOC_ADC_RTC_MAX_BITWIDTH
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SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256
Calibration
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SOC_ADC_CALIBRATION_V1_SUPPORTED
support HW offset calibration version 1
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SOC_APB_BACKUP_DMA
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SOC_BROWNOUT_RESET_SUPPORTED
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SOC_MMU_LINEAR_ADDRESS_REGION_NUM
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SOC_CPU_CORES_NUM
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SOC_CPU_INTR_NUM
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SOC_CPU_HAS_FPU
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SOC_CPU_BREAKPOINTS_NUM
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SOC_CPU_WATCHPOINTS_NUM
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SOC_CPU_WATCHPOINT_SIZE
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SOC_DS_SIGNATURE_MAX_BIT_LEN
The maximum length of a Digital Signature in bits.
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SOC_DS_KEY_PARAM_MD_IV_LENGTH
Initialization vector (IV) length for the RSA key parameter message digest (MD) in bytes.
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SOC_DS_KEY_CHECK_MAX_WAIT_US
Maximum wait time for DS parameter decryption key. If overdue, then key error. See TRM DS chapter for more details
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SOC_GDMA_GROUPS
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SOC_GDMA_PAIRS_PER_GROUP
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SOC_GDMA_SUPPORT_PSRAM
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SOC_GDMA_PSRAM_MIN_ALIGN
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SOC_GPIO_PORT
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SOC_GPIO_PIN_COUNT
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SOC_GPIO_SUPPORT_RTC_INDEPENDENT
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SOC_GPIO_SUPPORT_FORCE_HOLD
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SOC_GPIO_VALID_GPIO_MASK
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SOC_GPIO_VALID_OUTPUT_GPIO_MASK
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SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK
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SOC_DEDIC_GPIO_OUT_CHANNELS_NUM
8 outward channels on each CPU core
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SOC_DEDIC_GPIO_IN_CHANNELS_NUM
8 inward channels on each CPU core
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SOC_DEDIC_GPIO_OUT_AUTO_ENABLE
Dedicated GPIO output attribution is enabled automatically
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SOC_I2C_NUM
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SOC_I2C_FIFO_LEN
I2C hardware FIFO depth
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SOC_I2C_SUPPORT_SLAVE
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SOC_I2C_SUPPORT_HW_CLR_BUS
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SOC_I2C_SUPPORT_XTAL
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SOC_I2C_SUPPORT_RTC
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SOC_I2S_NUM
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SOC_I2S_HW_VERSION_2
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SOC_I2S_SUPPORTS_PCM
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SOC_I2S_SUPPORTS_PDM
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SOC_I2S_SUPPORTS_PDM_TX
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SOC_I2S_SUPPORTS_PDM_RX
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SOC_I2S_SUPPORTS_PDM_CODEC
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SOC_I2S_SUPPORTS_TDM
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SOC_MCPWM_GROUPS
2 MCPWM groups on the chip (i.e., the number of independent MCPWM peripherals)
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SOC_MCPWM_TIMERS_PER_GROUP
The number of timers that each group has.
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SOC_MCPWM_OPERATORS_PER_GROUP
The number of operators that each group has.
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SOC_MCPWM_COMPARATORS_PER_OPERATOR
The number of comparators that each operator has.
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SOC_MCPWM_GENERATORS_PER_OPERATOR
The number of generators that each operator has.
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SOC_MCPWM_TRIGGERS_PER_OPERATOR
The number of triggers that each operator has.
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SOC_MCPWM_GPIO_FAULTS_PER_GROUP
The number of fault signal detectors that each group has.
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SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP
The number of capture timers that each group has.
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SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER
The number of capture channels that each capture timer has.
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SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP
The number of GPIO synchros that each group has.
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SOC_MCPWM_SWSYNC_CAN_PROPAGATE
Software sync event can be routed to its output.
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SOC_PCNT_GROUPS
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SOC_PCNT_UNITS_PER_GROUP
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SOC_PCNT_CHANNELS_PER_UNIT
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SOC_PCNT_THRES_POINT_PER_UNIT
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SOC_RMT_GROUPS
One RMT group
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SOC_RMT_TX_CANDIDATES_PER_GROUP
Number of channels that capable of Transmit in each group
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SOC_RMT_RX_CANDIDATES_PER_GROUP
Number of channels that capable of Receive in each group
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SOC_RMT_CHANNELS_PER_GROUP
Total 8 channels
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SOC_RMT_MEM_WORDS_PER_CHANNEL
Each channel owns 48 words memory (1 word = 4 Bytes)
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SOC_RMT_SUPPORT_RX_PINGPONG
Support Ping-Pong mode on RX path
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SOC_RMT_SUPPORT_RX_DEMODULATION
Support signal demodulation on RX path (i.e. remove carrier)
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SOC_RMT_SUPPORT_TX_ASYNC_STOP
Support stop transmission asynchronously
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SOC_RMT_SUPPORT_TX_LOOP_COUNT
Support transmit specified number of cycles in loop mode
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SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP
Hardware support of auto-stop in loop mode
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SOC_RMT_SUPPORT_TX_SYNCHRO
Support coordinate a group of TX channels to start simultaneously
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SOC_RMT_SUPPORT_TX_CARRIER_DATA_ONLY
TX carrier can be modulated to data phase only
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SOC_RMT_SUPPORT_XTAL
Support set XTAL clock as the RMT clock source
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SOC_RMT_SUPPORT_RC_FAST
Support set RC_FAST clock as the RMT clock source
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SOC_RMT_SUPPORT_APB
Support set APB as the RMT clock source
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SOC_RMT_SUPPORT_DMA
RMT peripheral can connect to DMA channel
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SOC_LCD_I80_SUPPORTED
Intel 8080 LCD is supported
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SOC_LCD_RGB_SUPPORTED
RGB LCD is supported
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SOC_LCD_I80_BUSES
Has one LCD Intel 8080 bus
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SOC_LCD_RGB_PANELS
Support one RGB LCD panel
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SOC_LCD_I80_BUS_WIDTH
Intel 8080 bus width
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SOC_LCD_RGB_DATA_WIDTH
Number of LCD data lines
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SOC_LCD_SUPPORT_RGB_YUV_CONV
Support color format conversion between RGB and YUV
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SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH
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SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM
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SOC_RTC_CNTL_CPU_PD_DMA_ADDR_ALIGN
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SOC_RTC_CNTL_CPU_PD_DMA_BLOCK_SIZE
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SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE
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SOC_RTC_CNTL_TAGMEM_PD_DMA_BUS_WIDTH
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SOC_RTC_CNTL_TAGMEM_PD_DMA_ADDR_ALIGN
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SOC_RTCIO_PIN_COUNT
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SOC_RTCIO_INPUT_OUTPUT_SUPPORTED
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SOC_RTCIO_HOLD_SUPPORTED
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SOC_RTCIO_WAKE_SUPPORTED
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SOC_SDM_GROUPS
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SOC_SDM_CHANNELS_PER_GROUP
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SOC_SPI_PERIPH_NUM
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SOC_SPI_PERIPH_CS_NUM(i)
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SOC_SPI_MAX_CS_NUM
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SOC_SPI_MAXIMUM_BUFFER_SIZE
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SOC_SPI_SUPPORT_DDRCLK
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SOC_SPI_SLAVE_SUPPORT_SEG_TRANS
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SOC_SPI_SUPPORT_CD_SIG
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SOC_SPI_SUPPORT_CONTINUOUS_TRANS
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SOC_SPI_SUPPORT_SLAVE_HD_VER2
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SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(host_id)
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SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT
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SOC_MEMSPI_IS_INDEPENDENT
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SOC_SPI_MAX_PRE_DIVIDER
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SOC_SPI_SUPPORT_OCT
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SOC_MEMSPI_SRC_FREQ_120M
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SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED
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SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED
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SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED
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SOC_SPIRAM_SUPPORTED
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SOC_SYSTIMER_COUNTER_NUM
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SOC_SYSTIMER_ALARM_NUM
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SOC_SYSTIMER_BIT_WIDTH_LO
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SOC_SYSTIMER_BIT_WIDTH_HI
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SOC_SYSTIMER_FIXED_DIVIDER
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SOC_SYSTIMER_INT_LEVEL
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SOC_SYSTIMER_ALARM_MISS_COMPENSATE
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SOC_TIMER_GROUPS
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SOC_TIMER_GROUP_TIMERS_PER_GROUP
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SOC_TIMER_GROUP_COUNTER_BIT_WIDTH
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SOC_TIMER_GROUP_SUPPORT_XTAL
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SOC_TIMER_GROUP_SUPPORT_APB
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SOC_TIMER_GROUP_TOTAL_TIMERS
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SOC_TOUCH_VERSION_2
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SOC_TOUCH_SENSOR_NUM
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SOC_TOUCH_PROXIMITY_CHANNEL_NUM
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SOC_TOUCH_PROXIMITY_MEAS_DONE_SUPPORTED
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SOC_TOUCH_PAD_THRESHOLD_MAX
If set touch threshold max value, The touch sensor can’t be in touched status
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SOC_TOUCH_PAD_MEASURE_WAIT_MAX
The timer frequency is 8Mhz, the max value is 0xff
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SOC_UART_NUM
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SOC_UART_FIFO_LEN
The UART hardware FIFO length
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SOC_UART_BITRATE_MAX
Max bit rate supported by UART
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SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
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SOC_UART_SUPPORT_WAKEUP_INT
Support UART wakeup interrupt
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SOC_UART_SUPPORT_APB_CLK
Support APB as the clock source
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SOC_UART_SUPPORT_RTC_CLK
Support RTC clock as the clock source
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SOC_UART_SUPPORT_XTAL_CLK
Support XTAL clock as the clock source
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SOC_UART_REQUIRE_CORE_RESET
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SOC_USB_PERIPH_NUM
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SOC_SHA_DMA_MAX_BUFFER_SIZE
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SOC_SHA_SUPPORT_DMA
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SOC_SHA_SUPPORT_RESUME
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SOC_SHA_GDMA
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SOC_SHA_SUPPORT_SHA1
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SOC_SHA_SUPPORT_SHA224
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SOC_SHA_SUPPORT_SHA256
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SOC_SHA_SUPPORT_SHA384
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SOC_SHA_SUPPORT_SHA512
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SOC_SHA_SUPPORT_SHA512_224
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SOC_SHA_SUPPORT_SHA512_256
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SOC_SHA_SUPPORT_SHA512_T
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SOC_RSA_MAX_BIT_LEN
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SOC_AES_SUPPORT_DMA
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SOC_AES_GDMA
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SOC_AES_SUPPORT_AES_128
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SOC_AES_SUPPORT_AES_256
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SOC_PM_SUPPORT_EXT_WAKEUP
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SOC_PM_SUPPORT_WIFI_WAKEUP
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SOC_PM_SUPPORT_BT_WAKEUP
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SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP
Supports waking up from touch pad trigger
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SOC_PM_SUPPORT_CPU_PD
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SOC_PM_SUPPORT_TAGMEM_PD
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SOC_PM_SUPPORT_RTC_PERIPH_PD
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SOC_PM_SUPPORT_MODEM_PD
Modem here includes wifi and ble
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SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY
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SOC_EFUSE_DIS_DOWNLOAD_DCACHE
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SOC_EFUSE_HARD_DIS_JTAG
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SOC_EFUSE_DIS_USB_JTAG
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SOC_EFUSE_SOFT_DIS_JTAG
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SOC_EFUSE_DIS_DIRECT_BOOT
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SOC_SECURE_BOOT_V2_RSA
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SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS
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SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS
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SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY
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SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX
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SOC_FLASH_ENCRYPTION_XTS_AES
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SOC_FLASH_ENCRYPTION_XTS_AES_OPTIONS
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SOC_FLASH_ENCRYPTION_XTS_AES_128
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SOC_FLASH_ENCRYPTION_XTS_AES_256
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SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE
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SOC_MEMPROT_MEM_ALIGN_SIZE
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SOC_PHY_DIG_REGS_MEM_SIZE
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SOC_MAC_BB_PD_MEM_SIZE
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SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH
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SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE
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SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND
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SOC_SPI_MEM_SUPPORT_AUTO_RESUME
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SOC_SPI_MEM_SUPPORT_SW_SUSPEND
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SOC_SPI_MEM_SUPPORT_OPI_MODE
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SOC_SPI_MEM_SUPPORT_TIME_TUNING
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SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE
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SOC_COEX_HW_PTI
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SOC_SDMMC_USE_GPIO_MATRIX
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SOC_SDMMC_NUM_SLOTS
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SOC_SDMMC_SUPPORT_XTAL_CLOCK
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SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC
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SOC_WIFI_HW_TSF
Support hardware TSF
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SOC_WIFI_FTM_SUPPORT
Support FTM
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SOC_WIFI_GCMP_SUPPORT
Support GCMP(GCMP128 and GCMP256)
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SOC_WIFI_WAPI_SUPPORT
Support WAPI
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SOC_WIFI_CSI_SUPPORT
Support CSI
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SOC_WIFI_MESH_SUPPORT
Support WIFI MESH
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SOC_BLE_SUPPORTED
Support Bluetooth Low Energy hardware
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SOC_BLE_MESH_SUPPORTED
Support BLE MESH
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SOC_BLE_50_SUPPORTED
Support Bluetooth 5.0