SoC Capabilities

This section lists definitions of the ESP32's SoC hardware capabilities. These definitions are commonly used in IDF to control which hardware dependent features are supported and thus compiled into the binary.

Note

These defines are currently not considered to be part of the public API, and may be changed at any time.

API Reference

Header File

components/soc/esp32/include/soc/soc_caps.h

Macros

SOC_CAPS_ECO_VER_MAX

SOC_ADC_SUPPORTED

SOC_DAC_SUPPORTED

SOC_UART_SUPPORTED

SOC_MCPWM_SUPPORTED

SOC_GPTIMER_SUPPORTED

SOC_SDMMC_HOST_SUPPORTED

SOC_BT_SUPPORTED

SOC_PCNT_SUPPORTED

SOC_WIFI_SUPPORTED

SOC_SDIO_SLAVE_SUPPORTED

SOC_TWAI_SUPPORTED

SOC_EMAC_SUPPORTED

SOC_ULP_SUPPORTED

SOC_CCOMP_TIMER_SUPPORTED

SOC_RTC_FAST_MEM_SUPPORTED

SOC_RTC_SLOW_MEM_SUPPORTED

SOC_RTC_MEM_SUPPORTED

SOC_I2S_SUPPORTED

SOC_RMT_SUPPORTED

SOC_SDM_SUPPORTED

SOC_GPSPI_SUPPORTED

SOC_LEDC_SUPPORTED

SOC_I2C_SUPPORTED

SOC_SUPPORT_COEXISTENCE

SOC_AES_SUPPORTED

SOC_MPI_SUPPORTED

SOC_SHA_SUPPORTED

SOC_FLASH_ENC_SUPPORTED

SOC_SECURE_BOOT_SUPPORTED

SOC_TOUCH_SENSOR_SUPPORTED

SOC_BOD_SUPPORTED

SOC_ULP_FSM_SUPPORTED

SOC_DPORT_WORKAROUND

SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL

SOC_XTAL_SUPPORT_26M

SOC_XTAL_SUPPORT_40M

SOC_XTAL_SUPPORT_AUTO_DETECT

SOC_ADC_RTC_CTRL_SUPPORTED: < SAR ADC Module

SOC_ADC_DIG_CTRL_SUPPORTED

SOC_ADC_DMA_SUPPORTED

SOC_ADC_DIG_SUPPORTED_UNIT(UNIT)

SOC_ADC_PERIPH_NUM

SOC_ADC_CHANNEL_NUM(PERIPH_NUM)

SOC_ADC_MAX_CHANNEL_NUM

SOC_ADC_ATTEN_NUM: Digital

SOC_ADC_DIGI_CONTROLLER_NUM

SOC_ADC_PATT_LEN_MAX

SOC_ADC_DIGI_MIN_BITWIDTH

SOC_ADC_DIGI_MAX_BITWIDTH

SOC_ADC_DIGI_RESULT_BYTES

SOC_ADC_DIGI_DATA_BYTES_PER_CONV

SOC_ADC_SAMPLE_FREQ_THRES_HIGH

SOC_ADC_SAMPLE_FREQ_THRES_LOW: RTC

SOC_ADC_RTC_MIN_BITWIDTH

SOC_ADC_RTC_MAX_BITWIDTH

SOC_SHARED_IDCACHE_SUPPORTED

SOC_IDCACHE_PER_CORE

SOC_CPU_CORES_NUM

SOC_CPU_INTR_NUM

SOC_CPU_HAS_FPU

SOC_CPU_BREAKPOINTS_NUM

SOC_CPU_WATCHPOINTS_NUM

SOC_CPU_WATCHPOINT_MAX_REGION_SIZE

SOC_DAC_CHAN_NUM

SOC_DAC_RESOLUTION

SOC_DAC_DMA_16BIT_ALIGN

SOC_GPIO_PORT

SOC_GPIO_PIN_COUNT

SOC_GPIO_VALID_GPIO_MASK

SOC_GPIO_VALID_OUTPUT_GPIO_MASK

SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK

SOC_I2C_NUM

SOC_I2C_FIFO_LEN: I2C hardware FIFO depth

SOC_I2C_CMD_REG_NUM: Number of I2C command registers

SOC_I2C_SUPPORT_SLAVE

SOC_I2C_SUPPORT_APB

SOC_I2S_NUM

SOC_I2S_HW_VERSION_1

SOC_I2S_SUPPORTS_APLL

SOC_I2S_SUPPORTS_PLL_F160M

SOC_I2S_SUPPORTS_PDM

SOC_I2S_SUPPORTS_PDM_TX

SOC_I2S_PDM_MAX_TX_LINES

SOC_I2S_SUPPORTS_PDM_RX

SOC_I2S_PDM_MAX_RX_LINES

SOC_I2S_SUPPORTS_ADC_DAC

SOC_I2S_SUPPORTS_ADC

SOC_I2S_SUPPORTS_DAC

SOC_I2S_SUPPORTS_LCD_CAMERA

SOC_I2S_TRANS_SIZE_ALIGN_WORD

SOC_I2S_LCD_I80_VARIANT

SOC_LCD_I80_SUPPORTED: Intel 8080 LCD is supported

SOC_LCD_I80_BUSES: Both I2S0/1 have LCD mode

SOC_LCD_I80_BUS_WIDTH: Intel 8080 bus width

SOC_LEDC_HAS_TIMER_SPECIFIC_MUX

SOC_LEDC_SUPPORT_APB_CLOCK

SOC_LEDC_SUPPORT_REF_TICK

SOC_LEDC_SUPPORT_HS_MODE

SOC_LEDC_CHANNEL_NUM

SOC_LEDC_TIMER_BIT_WIDTH

SOC_MCPWM_GROUPS: 2 MCPWM groups on the chip (i.e., the number of independent MCPWM peripherals)

SOC_MCPWM_TIMERS_PER_GROUP: The number of timers that each group has.

SOC_MCPWM_OPERATORS_PER_GROUP: The number of operators that each group has.

SOC_MCPWM_COMPARATORS_PER_OPERATOR: The number of comparators that each operator has.

SOC_MCPWM_GENERATORS_PER_OPERATOR: The number of generators that each operator has.

SOC_MCPWM_TRIGGERS_PER_OPERATOR: The number of triggers that each operator has.

SOC_MCPWM_GPIO_FAULTS_PER_GROUP: The number of GPIO fault signals that each group has.

SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP: The number of capture timers that each group has.

SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER: The number of capture channels that each capture timer has.

SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP: The number of GPIO synchros that each group has.

SOC_MMU_PERIPH_NUM

SOC_MMU_LINEAR_ADDRESS_REGION_NUM

SOC_MPU_CONFIGURABLE_REGIONS_SUPPORTED

SOC_MPU_MIN_REGION_SIZE

SOC_MPU_REGIONS_MAX_NUM

SOC_MPU_REGION_RO_SUPPORTED

SOC_MPU_REGION_WO_SUPPORTED

SOC_PCNT_GROUPS

SOC_PCNT_UNITS_PER_GROUP

SOC_PCNT_CHANNELS_PER_UNIT

SOC_PCNT_THRES_POINT_PER_UNIT

SOC_RMT_GROUPS: One RMT group

SOC_RMT_TX_CANDIDATES_PER_GROUP: Number of channels that capable of Transmit in each group

SOC_RMT_RX_CANDIDATES_PER_GROUP: Number of channels that capable of Receive in each group

SOC_RMT_CHANNELS_PER_GROUP: Total 8 channels

SOC_RMT_MEM_WORDS_PER_CHANNEL: Each channel owns 64 words memory

SOC_RMT_SUPPORT_REF_TICK: Support set REF_TICK as the RMT clock source

SOC_RMT_SUPPORT_APB: Support set APB as the RMT clock source

SOC_RMT_CHANNEL_CLK_INDEPENDENT: Can select different source clock for each channel

SOC_RTCIO_PIN_COUNT

SOC_RTCIO_INPUT_OUTPUT_SUPPORTED

SOC_RTCIO_HOLD_SUPPORTED

SOC_RTCIO_WAKE_SUPPORTED

SOC_SDM_GROUPS

SOC_SDM_CHANNELS_PER_GROUP

SOC_SDM_CLK_SUPPORT_APB

SOC_SPI_HD_BOTH_INOUT_SUPPORTED

SOC_SPI_AS_CS_SUPPORTED

SOC_SPI_PERIPH_NUM

SOC_SPI_DMA_CHAN_NUM

SOC_SPI_PERIPH_CS_NUM(i)

SOC_SPI_MAX_CS_NUM

SOC_SPI_SUPPORT_CLK_APB

SOC_SPI_MAXIMUM_BUFFER_SIZE

SOC_SPI_MAX_PRE_DIVIDER

SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED

SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED

SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED

SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED

SOC_SPI_PERIPH_SUPPORT_MULTILINE_MODE(spi_host)

SOC_TIMER_GROUPS

SOC_TIMER_GROUP_TIMERS_PER_GROUP

SOC_TIMER_GROUP_COUNTER_BIT_WIDTH

SOC_TIMER_GROUP_TOTAL_TIMERS

SOC_TIMER_GROUP_SUPPORT_APB

SOC_TOUCH_VERSION_1: Hardware version of touch sensor

SOC_TOUCH_SENSOR_NUM

SOC_TOUCH_PAD_MEASURE_WAIT_MAX: The timer frequency is 8Mhz, the max value is 0xff

SOC_TOUCH_PAD_THRESHOLD_MAX: If set touch threshold max value, The touch sensor can't be in touched status

SOC_TWAI_CONTROLLER_NUM

SOC_TWAI_BRP_MIN

SOC_TWAI_BRP_MAX

SOC_TWAI_CLK_SUPPORT_APB

SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT

SOC_UART_NUM

SOC_UART_SUPPORT_APB_CLK: Support APB as the clock source

SOC_UART_SUPPORT_REF_TICK: Support REF_TICK as the clock source

SOC_UART_FIFO_LEN: The UART hardware FIFO length

SOC_UART_BITRATE_MAX: Max bit rate supported by UART

SOC_SPIRAM_SUPPORTED

SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE

SOC_SHA_SUPPORT_PARALLEL_ENG

SOC_SHA_SUPPORT_SHA1

SOC_SHA_SUPPORT_SHA256

SOC_SHA_SUPPORT_SHA384

SOC_SHA_SUPPORT_SHA512

SOC_RSA_MAX_BIT_LEN

SOC_AES_SUPPORT_AES_128

SOC_AES_SUPPORT_AES_192

SOC_AES_SUPPORT_AES_256

SOC_SECURE_BOOT_V1

SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS

SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX

SOC_PHY_DIG_REGS_MEM_SIZE

SOC_PM_SUPPORT_EXT0_WAKEUP

SOC_PM_SUPPORT_EXT1_WAKEUP

SOC_PM_SUPPORT_EXT_WAKEUP: Compatible to the old version of IDF

SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP: Supports waking up from touch pad trigger

SOC_PM_SUPPORT_RTC_PERIPH_PD

SOC_PM_SUPPORT_RTC_FAST_MEM_PD

SOC_PM_SUPPORT_RTC_SLOW_MEM_PD

SOC_PM_SUPPORT_RC_FAST_PD

SOC_PM_SUPPORT_VDDSDIO_PD

SOC_PM_SUPPORT_MODEM_PD: Modem here includes wifi and btdm

SOC_CONFIGURABLE_VDDSDIO_SUPPORTED

SOC_CLK_APLL_SUPPORTED

SOC_APLL_MULTIPLIER_OUT_MIN_HZ

SOC_APLL_MULTIPLIER_OUT_MAX_HZ

SOC_APLL_MIN_HZ

SOC_APLL_MAX_HZ

SOC_CLK_RC_FAST_D256_SUPPORTED

SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256

SOC_CLK_RC_FAST_SUPPORT_CALIBRATION

SOC_CLK_XTAL32K_SUPPORTED: Support to connect an external low frequency crystal

SOC_SDMMC_USE_IOMUX

SOC_SDMMC_NUM_SLOTS

SOC_WIFI_WAPI_SUPPORT: Support WAPI

SOC_WIFI_CSI_SUPPORT: Support CSI

SOC_WIFI_MESH_SUPPORT: Support WIFI MESH

SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW: Support delta early time for rf phy on/off

SOC_WIFI_NAN_SUPPORT: Support WIFI Aware (NAN)

SOC_BLE_SUPPORTED: Support Bluetooth Low Energy hardware

SOC_BLE_MESH_SUPPORTED: Support BLE MESH

SOC_BT_CLASSIC_SUPPORTED: Support Bluetooth Classic hardware

SOC_BLE_DEVICE_PRIVACY_SUPPORTED: Support BLE device privacy mode

SOC_BLUFI_SUPPORTED: Support BLUFI

SOC_ULP_HAS_ADC

SOC_PHY_COMBO_MODULE: Support Wi-Fi, BT and BLE

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