并行 IO

[English]

简介

[并行 IO 外设] 是一个通用的并行接口，可用于连接外部设备，如 LED 矩阵、LCD 显示器、打印机和摄像头。该外设具有独立的 TX 和 RX 单元。每个单元最多可以具有 8 或 16 个数据信号以及 1 或 2 个时钟信号。

并行 IO 外设的 TX 和 RX 驱动程序有各自独立的设计，可分别通过包含头文件 driver/parlio_tx.h 或 driver/parlio_rx.h 来使用。

API 参考

Header File

  • components/esp_driver_parlio/include/driver/parlio_types.h

  • This header file can be included with:

    #include "driver/parlio_types.h"

  • This header file is a part of the API provided by the esp_driver_parlio component. To declare that your component depends on esp_driver_parlio, add the following to your CMakeLists.txt:

    REQUIRES esp_driver_parlio

    or

    PRIV_REQUIRES esp_driver_parlio

Type Definitions

typedef struct parlio_tx_unit_t *parlio_tx_unit_handle_t

Type of Parallel IO TX unit handle.

typedef struct parlio_rx_unit_t *parlio_rx_unit_handle_t

Type of Parallel IO RX unit handle.

typedef struct parlio_rx_delimiter_t *parlio_rx_delimiter_handle_t

Type of Parallel IO RX frame delimiter handle.

Header File

Macros

PARLIO_TX_UNIT_MAX_DATA_WIDTH

Maximum data width of TX unit.

PARLIO_RX_UNIT_MAX_DATA_WIDTH

Maximum data width of RX unit.

Type Definitions

typedef soc_periph_parlio_clk_src_t parlio_clock_source_t

Parallel IO clock source.

备注

User should select the clock source based on the power and resolution requirement

Enumerations

enum parlio_sample_edge_t

Parallel IO sample edge.

Values:

enumerator PARLIO_SAMPLE_EDGE_NEG

Sample data on falling edge of clock

enumerator PARLIO_SAMPLE_EDGE_POS

Sample data on rising edge of clock

enum parlio_bit_pack_order_t

Parallel IO bit packing order.

Data in memory: Byte 0: MSB < B0.7 B0.6 B0.5 B0.4 B0.3 B0.2 B0.1 B0.0 > LSB Byte 1: MSB < B1.7 B1.6 B1.5 B1.4 B1.3 B1.2 B1.1 B1.0 > LSB

Output on line (PARLIO_BIT_PACK_ORDER_LSB): Cycle 0 Cycle 1 Cycle 2 —> time GPIO 0: B0.0 B0.4 B1.0 GPIO 1: B0.1 B0.5 B1.1 GPIO 2: B0.2 B0.6 B1.2 GPIO 3: B0.3 B0.7 B1.3

Output on line (PARLIO_BIT_PACK_ORDER_MSB): Cycle 0 Cycle 1 Cycle 2 —> time GPIO 0: B0.4 B0.0 B1.4 GPIO 1: B0.5 B0.1 B1.5 GPIO 2: B0.6 B0.2 B1.6 GPIO 3: B0.7 B0.3 B1.7

Values:

enumerator PARLIO_BIT_PACK_ORDER_LSB

Bit pack order: LSB

enumerator PARLIO_BIT_PACK_ORDER_MSB

Bit pack order: MSB

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