Programming ULP coprocessor using C macros (legacy)¶
In addition to the existing binutils port for the ESP32 ULP coprocessor, it is possible to generate programs for the ULP by embedding assembly-like macros into an ESP32 application. Here is an example how this can be done:
const ulp_insn_t program[] = {
I_MOVI(R3, 16), // R3 <- 16
I_LD(R0, R3, 0), // R0 <- RTC_SLOW_MEM[R3 + 0]
I_LD(R1, R3, 1), // R1 <- RTC_SLOW_MEM[R3 + 1]
I_ADDR(R2, R0, R1), // R2 <- R0 + R1
I_ST(R2, R3, 2), // R2 -> RTC_SLOW_MEM[R2 + 2]
I_HALT()
};
size_t load_addr = 0;
size_t size = sizeof(program)/sizeof(ulp_insn_t);
ulp_process_macros_and_load(load_addr, program, &size);
ulp_run(load_addr);
The program
array is an array of ulp_insn_t
, i.e. ULP coprocessor instructions. Each I_XXX
preprocessor define translates into a single 32-bit instruction. Arguments of these preprocessor defines can be register numbers (R0 — R3
) and literal constants. See ULP coprocessor instruction defines section for descriptions of instructions and arguments they take.
注解
Because some of the instruction macros expand to inline function calls, defining such array in global scope will cause the compiler to produce an “initializer element is not constant” error. To fix this error, move the definition of instructions array into local scope.
Load and store instructions use addresses expressed in 32-bit words. Address 0 corresponds to the first word of RTC_SLOW_MEM
(which is address 0x50000000 as seen by the main CPUs).
To generate branch instructions, special M_
preprocessor defines are used. M_LABEL
define can be used to define a branch target. Label identifier is a 16-bit integer. M_Bxxx
defines can be used to generate branch instructions with target set to a particular label.
Implementation note: these M_
preprocessor defines will be translated into two ulp_insn_t
values: one is a token value which contains label number, and the other is the actual instruction. ulp_process_macros_and_load
function resolves the label number to the address, modifies the branch instruction to use the correct address, and removes the the extra ulp_insn_t
token which contains the label numer.
Here is an example of using labels and branches:
const ulp_insn_t program[] = {
I_MOVI(R0, 34), // R0 <- 34
M_LABEL(1), // label_1
I_MOVI(R1, 32), // R1 <- 32
I_LD(R1, R1, 0), // R1 <- RTC_SLOW_MEM[R1]
I_MOVI(R2, 33), // R2 <- 33
I_LD(R2, R2, 0), // R2 <- RTC_SLOW_MEM[R2]
I_SUBR(R3, R1, R2), // R3 <- R1 - R2
I_ST(R3, R0, 0), // R3 -> RTC_SLOW_MEM[R0 + 0]
I_ADDI(R0, R0, 1), // R0++
M_BL(1, 64), // if (R0 < 64) goto label_1
I_HALT(),
};
RTC_SLOW_MEM[32] = 42;
RTC_SLOW_MEM[33] = 18;
size_t load_addr = 0;
size_t size = sizeof(program)/sizeof(ulp_insn_t);
ulp_process_macros_and_load(load_addr, program, &size);
ulp_run(load_addr);
Application Example¶
Demonstration of entering into deep sleep mode and waking up using several wake up sources: system/deep_sleep.
API Reference¶
Header File¶
Functions¶
-
esp_err_t
ulp_process_macros_and_load
(uint32_t load_addr, const ulp_insn_t *program, size_t *psize)¶ Resolve all macro references in a program and load it into RTC memory.
- Return
ESP_OK on success
ESP_ERR_NO_MEM if auxiliary temporary structure can not be allocated
one of ESP_ERR_ULP_xxx if program is not valid or can not be loaded
- Parameters
load_addr
: address where the program should be loaded, expressed in 32-bit wordsprogram
: ulp_insn_t array with the programpsize
: size of the program, expressed in 32-bit words
-
esp_err_t
ulp_run
(uint32_t entry_point) Run the program loaded into RTC memory.
- Return
ESP_OK on success
- Parameters
entry_point
: entry point, expressed in 32-bit words
Error codes¶
-
ESP_ERR_ULP_BASE
¶ Offset for ULP-related error codes
-
ESP_ERR_ULP_SIZE_TOO_BIG
¶ Program doesn’t fit into RTC memory reserved for the ULP
-
ESP_ERR_ULP_INVALID_LOAD_ADDR
¶ Load address is outside of RTC memory reserved for the ULP
-
ESP_ERR_ULP_DUPLICATE_LABEL
¶ More than one label with the same number was defined
-
ESP_ERR_ULP_UNDEFINED_LABEL
¶ Branch instructions references an undefined label
-
ESP_ERR_ULP_BRANCH_OUT_OF_RANGE
¶ Branch target is out of range of B instruction (try replacing with BX)
ULP coprocessor registers¶
ULP co-processor has 4 16-bit general purpose registers. All registers have same functionality, with one exception. R0 register is used by some of the compare-and-branch instructions as a source register.
These definitions can be used for all instructions which require a register.
-
R0
¶ general purpose register 0
-
R1
¶ general purpose register 1
-
R2
¶ general purpose register 2
-
R3
¶ general purpose register 3
ULP coprocessor instruction defines¶
-
I_DELAY
(cycles_)¶ Delay (nop) for a given number of cycles
-
I_HALT
()¶ Halt the coprocessor.
This instruction halts the coprocessor, but keeps ULP timer active. As such, ULP program will be restarted again by timer. To stop the program and prevent the timer from restarting the program, use I_END(0) instruction.
-
I_END
()¶ Stop ULP program timer.
This is a convenience macro which disables the ULP program timer. Once this instruction is used, ULP program will not be restarted anymore until ulp_run function is called.
ULP program will continue running after this instruction. To stop the currently running program, use I_HALT().
-
I_ST
(reg_val, reg_addr, offset_)¶ Store value from register reg_val into RTC memory.
The value is written to an offset calculated by adding value of reg_addr register and offset_ field (this offset is expressed in 32-bit words). 32 bits written to RTC memory are built as follows:
bits [31:21] hold the PC of current instruction, expressed in 32-bit words
bits [20:16] = 5’b1
bits [15:0] are assigned the contents of reg_val
RTC_SLOW_MEM[addr + offset_] = { 5’b0, insn_PC[10:0], val[15:0] }
-
I_LD
(reg_dest, reg_addr, offset_)¶ Load value from RTC memory into reg_dest register.
Loads 16 LSBs from RTC memory word given by the sum of value in reg_addr and value of offset_.
-
I_WR_REG
(reg, low_bit, high_bit, val)¶ Write literal value to a peripheral register
reg[high_bit : low_bit] = val This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
-
I_RD_REG
(reg, low_bit, high_bit)¶ Read from peripheral register into R0
R0 = reg[high_bit : low_bit] This instruction can access RTC_CNTL_, RTC_IO_, SENS_, and RTC_I2C peripheral registers.
-
I_BL
(pc_offset, imm_value)¶ Branch relative if R0 less than immediate value.
pc_offset is expressed in words, and can be from -127 to 127 imm_value is a 16-bit value to compare R0 against
-
I_BGE
(pc_offset, imm_value)¶ Branch relative if R0 greater or equal than immediate value.
pc_offset is expressed in words, and can be from -127 to 127 imm_value is a 16-bit value to compare R0 against
-
I_BXR
(reg_pc)¶ Unconditional branch to absolute PC, address in register.
reg_pc is the register which contains address to jump to. Address is expressed in 32-bit words.
-
I_BXI
(imm_pc)¶ Unconditional branch to absolute PC, immediate address.
Address imm_pc is expressed in 32-bit words.
-
I_BXZR
(reg_pc)¶ Branch to absolute PC if ALU result is zero, address in register.
reg_pc is the register which contains address to jump to. Address is expressed in 32-bit words.
-
I_BXZI
(imm_pc)¶ Branch to absolute PC if ALU result is zero, immediate address.
Address imm_pc is expressed in 32-bit words.
-
I_BXFR
(reg_pc)¶ Branch to absolute PC if ALU overflow, address in register
reg_pc is the register which contains address to jump to. Address is expressed in 32-bit words.
-
I_BXFI
(imm_pc)¶ Branch to absolute PC if ALU overflow, immediate address
Address imm_pc is expressed in 32-bit words.
-
I_ADDR
(reg_dest, reg_src1, reg_src2)¶ Addition: dest = src1 + src2
-
I_SUBR
(reg_dest, reg_src1, reg_src2)¶ Subtraction: dest = src1 - src2
-
I_ANDR
(reg_dest, reg_src1, reg_src2)¶ Logical AND: dest = src1 & src2
-
I_ORR
(reg_dest, reg_src1, reg_src2)¶ Logical OR: dest = src1 | src2
-
I_MOVR
(reg_dest, reg_src)¶ Copy: dest = src
-
I_LSHR
(reg_dest, reg_src, reg_shift)¶ Logical shift left: dest = src << shift
-
I_RSHR
(reg_dest, reg_src, reg_shift)¶ Logical shift right: dest = src >> shift
-
I_ADDI
(reg_dest, reg_src, imm_)¶ Add register and an immediate value: dest = src1 + imm
-
I_SUBI
(reg_dest, reg_src, imm_)¶ Subtract register and an immediate value: dest = src - imm
-
I_ANDI
(reg_dest, reg_src, imm_)¶ Logical AND register and an immediate value: dest = src & imm
-
I_ORI
(reg_dest, reg_src, imm_)¶ Logical OR register and an immediate value: dest = src | imm
-
I_MOVI
(reg_dest, imm_)¶ Copy an immediate value into register: dest = imm
-
I_LSHI
(reg_dest, reg_src, imm_)¶ Logical shift left register value by an immediate: dest = src << imm
-
I_RSHI
(reg_dest, reg_src, imm_)¶ Logical shift right register value by an immediate: dest = val >> imm
-
M_LABEL
(label_num)¶ Define a label with number label_num.
This is a macro which doesn’t generate a real instruction. The token generated by this macro is removed by ulp_process_macros_and_load function. Label defined using this macro can be used in branch macros defined below.
-
M_BL
(label_num, imm_value)¶ Macro: branch to label label_num if R0 is less than immediate value.
This macro generates two ulp_insn_t values separated by a comma, and should be used when defining contents of ulp_insn_t arrays. First value is not a real instruction; it is a token which is removed by ulp_process_macros_and_load function.
-
M_BGE
(label_num, imm_value)¶ Macro: branch to label label_num if R0 is greater or equal than immediate value
This macro generates two ulp_insn_t values separated by a comma, and should be used when defining contents of ulp_insn_t arrays. First value is not a real instruction; it is a token which is removed by ulp_process_macros_and_load function.
-
M_BX
(label_num)¶ Macro: unconditional branch to label
This macro generates two ulp_insn_t values separated by a comma, and should be used when defining contents of ulp_insn_t arrays. First value is not a real instruction; it is a token which is removed by ulp_process_macros_and_load function.
-
M_BXZ
(label_num)¶ Macro: branch to label if ALU result is zero
This macro generates two ulp_insn_t values separated by a comma, and should be used when defining contents of ulp_insn_t arrays. First value is not a real instruction; it is a token which is removed by ulp_process_macros_and_load function.
-
M_BXF
(label_num)¶ Macro: branch to label if ALU overflow
This macro generates two ulp_insn_t values separated by a comma, and should be used when defining contents of ulp_insn_t arrays. First value is not a real instruction; it is a token which is removed by ulp_process_macros_and_load function.