Module lp_io

Available on crate feature unstable only.

Low Power IO (LP_IO)

Overview

The hardware provides a couple of GPIO pins with low power (LP) capabilities and analog functions.

Configuration

These pins can be controlled by either IO MUX or LP IO MUX.

If controlled by LP IO MUX, these pins will bypass IO MUX and GPIO matrix for the use by ULP and peripherals in LP system.

When configured as LP GPIOs, the pins can still be controlled by ULP or the peripherals in LP system during chip Deep-sleep, and wake up the chip from Deep-sleep.

Examples

Configure a LP Pin as Output

use esp_hal::gpio::lp_io::LowPowerOutput;
// configure GPIO 1 as LP output pin
let lp_pin: LowPowerOutput<'_, 1> =
    LowPowerOutput::new(peripherals.GPIO1);

Structs

LowPowerInput

A GPIO input pin configured for low power operation

LowPowerOutput

A GPIO output pin configured for low power operation

LowPowerOutputOpenDrain

A GPIO open-drain output pin configured for low power operation