Module clock 

EMAC clock configuration for ESP32.

RMII reference clock sources

The ESP32 EMAC needs a 50 MHz reference clock for RMII. There are two hardware modes:

• ExternalRefClock — the PHY drives EMAC_TX_CLK. Set RmiiPinBundle::clock when calling Ethernet::new; use this when the PHY has an oscillator.

• ApllClock — the ESP32 APLL is tuned to 50 MHz and the output is routed through EMAC_CLK_OUT or EMAC_CLK_180. The EMAC_EXT block feeds this clock back into the MAC. Use this when the PHY requires an external clock reference (e.g. LAN8720A in clock-output mode).

  Warning: the APLL is shared with I²S and LCD. Requesting 50 MHz while another subsystem already uses the APLL at a different frequency will result in silent corruption. There is currently no shared-APLL arbitration in esp-hal. Also, APLL is unstable when Wi-Fi is active, so Wi-Fi must not be used together with this clock source.

MII clock source

Using Ethernet::new with MiiPinBundle enables the EMAC_EXT MII clock buffers. In MII mode the PHY drives both TX_CLK and RX_CLK at 25 MHz (100 Mbps) or 2.5 MHz (10 Mbps) — no internal clock generation is required.

Structs

ApllClock

RMII reference clock generated internally by the ESP32 APLL at 50 MHz.

ExternalRefClock

RMII reference clock provided externally by the PHY.