Enum InputSync 

pub enum InputSync {
    Disabled = 0,
    NegativeEdge = 1,
    PositiveEdge = 2,
}

Available on crate feature unstable only.

Configures the clock edge used in one of the two input synchronization stages to synchronize the GPIO input signal to the system clock, reducing metastability.

See InputConfig::with_input_sync_stage1 and InputConfig::with_input_sync_stage2.

Stability

This API is marked as unstable and is only available when the unstable crate feature is enabled. This comes with no stability guarantees, and could be changed or removed at any time.

Variants

Disabled = 0

Stage is disabled; the signal passes through without latching (hardware default).

NegativeEdge = 1

Stage latches on the falling edge of the GPIO clock.

PositiveEdge = 2

Stage latches on the rising edge of the GPIO clock.

Trait Implementations

impl Clone for InputSync

fn clone(&self) -> InputSync

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for InputSync

impl Debug for InputSync

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for InputSync

fn default() -> InputSync

Returns the “default value” for a type.

impl Eq for InputSync

impl Hash for InputSync

fn hash<__H: Hasher>(&self, state: &mut __H)

Feeds this value into the given [Hasher].

fn hash_slice<H>(data: &[Self], state: &mut H)

where H: Hasher, Self: Sized,

Feeds a slice of this type into the given [Hasher].

impl PartialEq for InputSync

fn eq(&self, other: &InputSync) -> bool

Equality operator ==.

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=.

impl StructuralPartialEq for InputSync