Enum DataFormat

Source

pub enum DataFormat {
    Data32Channel32,
    Data32Channel24,
    Data32Channel16,
    Data32Channel8,
    Data16Channel16,
    Data16Channel8,
    Data8Channel8,
}

Expand description

Supported I2S data formats.

Each format defines two dimensions:

Data{X} (on-wire slot width): The number of bit-clock (BCLK) cycles allocated to each channel slot on the physical line (Self::data_bits). This determines the BCLK frequency (BCLK = sample_rate * channels * data_bits) and the time duration of each channel slot.
Channel{Y} (in-memory sample width): The number of active audio data bits per sample transferred to or from memory via DMA (Self::channel_bits).

§In-Memory Representation

In the DMA memory buffer, samples are stored with a size corresponding to Channel{Y}:

32-bit (Channel32): 4 bytes per sample (e.g. i32 / u32).
24-bit (Channel24): 3 bytes per sample (packed 24-bit PCM).
16-bit (Channel16): 2 bytes per sample (e.g. i16 / u16).
8-bit (Channel8): 1 byte per sample (e.g. i8 / u8).

§On-Wire Representation and Padding

On the physical I2S lines, each channel occupies Data{X} clock cycles:

When X == Y (e.g. Data16Channel16, Data32Channel32), the entire slot carries sample data with no padding.
When X > Y (e.g. Data32Channel16), the Y-bit sample occupies Y bits of the X-bit slot on the wire, and the remaining X - Y bits are padded or discarded according to Alignment:
- Alignment::Left (default):
  - TX: The Y sample bits are transmitted first (MSB-aligned within the slot), followed by X - Y zero bits.
  - RX: The first Y bits from the wire are captured into memory; trailing bits in the slot are discarded.
- Alignment::Right:
  - TX: X - Y zero bits are transmitted first, followed by the Y sample bits (LSB-aligned within the slot).
  - RX: The leading X - Y bits are discarded; the last Y bits of the slot are captured into memory.

Note: In this driver’s naming scheme, Data{X} refers to the on-wire slot width, and Channel{Y} refers to the in-memory sample data width. (This differs from some datasheets where the on-wire slot is called “slot width” or “channel width”, and the sample size is called “data width”.)

Variants§

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Data32Channel32

32-bit on-wire slot width (32 BCLK cycles) and 32-bit in-memory sample width (4 bytes per sample).

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Data32Channel24

32-bit on-wire slot width (32 BCLK cycles) and 24-bit in-memory sample width (3 bytes packed per sample).

In TX, 24-bit samples from memory are padded to 32 bits on the wire according to Alignment. In RX, 24 bits are extracted from each 32-bit slot on the wire into memory.

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Data32Channel16

32-bit on-wire slot width (32 BCLK cycles) and 16-bit in-memory sample width (2 bytes per sample).

In TX, 16-bit samples from memory are padded to 32 bits on the wire according to Alignment. In RX, 16 bits are extracted from each 32-bit slot on the wire into memory.

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Data32Channel8

32-bit on-wire slot width (32 BCLK cycles) and 8-bit in-memory sample width (1 byte per sample).

In TX, 8-bit samples from memory are padded to 32 bits on the wire according to Alignment. In RX, 8 bits are extracted from each 32-bit slot on the wire into memory.

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Data16Channel16

16-bit on-wire slot width (16 BCLK cycles) and 16-bit in-memory sample width (2 bytes per sample).

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Data16Channel8

16-bit on-wire slot width (16 BCLK cycles) and 8-bit in-memory sample width (1 byte per sample).

In TX, 8-bit samples from memory are padded to 16 bits on the wire according to Alignment. In RX, 8 bits are extracted from each 16-bit slot on the wire into memory.

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