pub struct RgmiiPinBundle<RxClk, TxClk, RxCtl, TxCtl, Rxd0, Rxd1, Rxd2, Rxd3, Txd0, Txd1, Txd2, Txd3, Mdc, Mdio> {Show 14 fields
pub rx_clk: RxClk,
pub tx_clk: TxClk,
pub rx_ctl: RxCtl,
pub tx_ctl: TxCtl,
pub rxd0: Rxd0,
pub rxd1: Rxd1,
pub rxd2: Rxd2,
pub rxd3: Rxd3,
pub txd0: Txd0,
pub txd1: Txd1,
pub txd2: Txd2,
pub txd3: Txd3,
pub mdc: Mdc,
pub mdio: Mdio,
}Expand description
Wired RGMII pads (pass to Ethernet::new).
RGMII data and clock pads use IOMUX only. Do not route them through the GPIO
matrix (MiiTxd* / MiiRxd*).
Fields§
§rx_clk: RxClk§tx_clk: TxClk§rx_ctl: RxCtl§tx_ctl: TxCtl§rxd0: Rxd0§rxd1: Rxd1§rxd2: Rxd2§rxd3: Rxd3§txd0: Txd0§txd1: Txd1§txd2: Txd2§txd3: Txd3§mdc: Mdc§mdio: MdioTrait Implementations§
Source§impl<'d, RxClk, TxClk, RxCtl, TxCtl, Rxd0, Rxd1, Rxd2, Rxd3, Txd0, Txd1, Txd2, Txd3, Mdc, Mdio> EthernetPinBundle for RgmiiPinBundle<RxClk, TxClk, RxCtl, TxCtl, Rxd0, Rxd1, Rxd2, Rxd3, Txd0, Txd1, Txd2, Txd3, Mdc, Mdio>where
RxClk: RgmiiRxClk + 'd,
TxClk: RmiiClkOut + 'd,
RxCtl: RmiiCrsDv + 'd,
TxCtl: RmiiTxEn + 'd,
Rxd0: RmiiRxd0 + 'd,
Rxd1: RmiiRxd1 + 'd,
Rxd2: RgmiiRxd2 + 'd,
Rxd3: RgmiiRxd3 + 'd,
Txd0: RmiiTxd0 + 'd,
Txd1: RmiiTxd1 + 'd,
Txd2: RgmiiTxd2 + 'd,
Txd3: RgmiiTxd3 + 'd,
Mdc: PeripheralOutput<'d>,
Mdio: PeripheralInput<'d> + PeripheralOutput<'d>,
Available on crate feature unstable only.
impl<'d, RxClk, TxClk, RxCtl, TxCtl, Rxd0, Rxd1, Rxd2, Rxd3, Txd0, Txd1, Txd2, Txd3, Mdc, Mdio> EthernetPinBundle for RgmiiPinBundle<RxClk, TxClk, RxCtl, TxCtl, Rxd0, Rxd1, Rxd2, Rxd3, Txd0, Txd1, Txd2, Txd3, Mdc, Mdio>where
RxClk: RgmiiRxClk + 'd,
TxClk: RmiiClkOut + 'd,
RxCtl: RmiiCrsDv + 'd,
TxCtl: RmiiTxEn + 'd,
Rxd0: RmiiRxd0 + 'd,
Rxd1: RmiiRxd1 + 'd,
Rxd2: RgmiiRxd2 + 'd,
Rxd3: RgmiiRxd3 + 'd,
Txd0: RmiiTxd0 + 'd,
Txd1: RmiiTxd1 + 'd,
Txd2: RgmiiTxd2 + 'd,
Txd3: RgmiiTxd3 + 'd,
Mdc: PeripheralOutput<'d>,
Mdio: PeripheralInput<'d> + PeripheralOutput<'d>,
Available on crate feature
unstable only.Source§fn apply_speed(speed: Speed)
fn apply_speed(speed: Speed)
The MAC drives RGMII TX_CLK, so its divider has to follow the link:
125 MHz at 1000 Mbps, 25 MHz at 100 Mbps, 2.5 MHz at 10 Mbps.