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ESP32-P4 Series SoC Errata

  • Chip Revision Identification
  • Errata Summary
  • All Errata Descriptions
  • Errata Descriptions by Chip Revisions
  • Revision History

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Revision History

[δΈ­ζ–‡]

Table 4 Revision History

Date

Version

Release Notes

2026-02-12

v1.1

  • Chip Revision Identification
    • Added information about chip revisions v3.0 and v3.1

  • All Errata Descriptions
    • Added Section [MSPI-749] Load Access Fault During Chip Power-on or Deep-Sleep Wake-up

    • Added Section [MSPI-750] PSRAM Unaligned DMA Read Operations May Return Old Data When Accessing Overlapping Addresses

    • Added Section [MSPI-751] Data Errors Caused by Asynchronous Timing Issues in the MSPI Address Overlap Detection Function When Read/Write Operations Overlap at Specific Frequencies

    • Added Section [ROM-764] Secure Boot Verification Failure Caused by Incorrect Buffer Address in ROM

    • Added Section [Analog-765] Output Regulators Cannot Generate a Reliable Supply When Peripheral Power Domain Is Off

    • Added Section [DMA-767] DMA Channel 0 Transaction ID Overlap Causes Permission Management Issue

    • Added Section [APM-560] Unauthorized AHB Access May Block Subsequent PSRAM or Flash Transactions

    • Added Section [ROM-770] Secure Download Mode Flash Power-On Failure

2025-07-08

v1.0

First release

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