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Summary of Issues Related to RGB Interface Screen

[中文]

This document mainly summarizes the common problems in the development process of the RGB interface screen and provides corresponding solutions.

Related Documents

Detailed Explanation of RGB Interface Screen Development

Related Examples

Example of RGB 16/24 Line Parallel Interface Driver

Example of RGB 8 Line Parallel Interface Driver

Solution to Screen Drift Issue

Effect diagram of screen drift

Effect diagram of screen drift

  • Root cause of drift: The “drift” is essentially that after the GDMA interrupts the transmission stream (FIFO under-run), the LCD controller continues to take pixels from the wrong address, thus displaying the subsequent lines as the first few lines, and the entire image produces a line-by-line shift. It is a macro manifestation of GDMA → LCD FIFO underflow + FIFO pointer misalignment.

  • Solution:

    • BounceBuffer ≥ 20 lines (not too large, so as not to affect the execution of other interrupts), to ensure that ISR refill has enough VBlank time window

    esp_lcd_rgb_panel_config_t panel_config = {
        .data_width = EXAMPLE_DATA_BUS_WIDTH,
        .dma_burst_size = 64,
        .num_fbs = EXAMPLE_LCD_NUM_FB,
        .bounce_buffer_size_px = 20 * EXAMPLE_LCD_H_RES,
        .clk_src = LCD_CLK_SRC_DEFAULT,
        .disp_gpio_num = EXAMPLE_PIN_NUM_DISP_EN,
        .pclk_gpio_num = EXAMPLE_PIN_NUM_PCLK,
        .vsync_gpio_num = EXAMPLE_PIN_NUM_VSYNC,
        .hsync_gpio_num = EXAMPLE_PIN_NUM_HSYNC,
        .de_gpio_num = EXAMPLE_PIN_NUM_DE,
        .data_gpio_nums = {
            ...
        },
        .timings = {
            .pclk_hz = EXAMPLE_LCD_PIXEL_CLOCK_HZ,
            .h_res = EXAMPLE_LCD_H_RES,
            .v_res = EXAMPLE_LCD_V_RES,
            .hsync_back_porch = EXAMPLE_LCD_HBP,
            .hsync_front_porch = EXAMPLE_LCD_HFP,
            .hsync_pulse_width = EXAMPLE_LCD_HSYNC,
            .vsync_back_porch = EXAMPLE_LCD_VBP,
            .vsync_front_porch = EXAMPLE_LCD_VFP,
            .vsync_pulse_width = EXAMPLE_LCD_VSYNC,
            .flags = {
                .pclk_active_neg = true,
            },
        },
        .flags.fb_in_psram = true, // allocate frame buffer in PSRAM
    };
    
    • Open XIP configuration to reduce long-term blocking, improve interrupt real-time performance, and thus reduce RGB FIFO underflow and drift.

    Support for external PSRAM  --->
        PSRAM config  --->
            [*] Enable Executable in place from (XiP) from PSRAM feature (READ HELP)
    
    - LVGL uses Direct Mode or reduces the refresh rate to minimize PSRAM bandwidth usage.
    
    [*] Avoid tearing effect
            Select Avoid Tearing Mode (Mode3: LCD double-buffer & LVGL direct-mode)  --->
            Select rotation (Rotation 0)  --->
    

Insufficient GPIO

  • The RGB interface will occupy a large number of GPIOs. If there is not enough IO, consider using a GPIO expansion chip to expand the SPI line, or consider multiplexing the data line with the SPI line.

  • Hardware reference: SCH_ESP32-S3-LCD-Ev-Board-MB_V1.5_20231009.pdf

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