Clock Tree
The clock subsystem of ESP32-P4 is used to source and distribute system/module clocks from a range of root clocks. The clock tree driver maintains the basic functionality of the system clock and the intricate relationship among module clocks.
This document starts with the introduction to root and module clocks. Then it covers the clock tree APIs that can be called to monitor the status of the module clocks at runtime.
Introduction
This section lists definitions of ESP32-P4's supported root clocks and module clocks. These definitions are commonly used in the driver configuration, to help select a proper source clock for the peripheral.
Root Clocks
Root clocks generate reliable clock signals. These clock signals then pass through various gates, muxes, dividers, or multipliers to become the clock sources for every functional module: the CPU core(s), Wi-Fi, Bluetooth, the RTC, and the peripherals.
ESP32-P4's root clocks are listed in soc_root_clk_t
:
Internal 17.5 MHz RC Oscillator (RC_FAST)
This RC oscillator generates a about 17.5 MHz clock signal output as the
RC_FAST_CLK
.The exact frequency of
RC_FAST_CLK
can be computed in runtime through calibration.External 40 MHz Crystal (XTAL)
Internal 136 kHz RC Oscillator (RC_SLOW)
This RC oscillator generates a about 136kHz clock signal output as the
RC_SLOW_CLK
. The exact frequency of this clock can be computed in runtime through calibration.
External 32 kHz Crystal - optional (XTAL32K)
The clock source for this
XTAL32K_CLK
is a 32 kHz crystal connecting to theXTAL_32K_P
andXTAL_32K_N
pins.
XTAL32K_CLK
can also be calibrated to get its exact frequency.
Internal 32 kHz RC Oscillator (RC32K)
The exact frequency of this clock can be computed in runtime through calibration.
Typically, the frequency of the signal generated from an RC oscillator circuit is less accurate and more sensitive to the environment compared to the signal generated from a crystal. ESP32-P4 provides several clock source options for the RTC_SLOW_CLK
, and it is possible to make the choice based on the requirements for system time accuracy and power consumption. For more details, please refer to RTC Timer Clock Sources.
Module Clocks
ESP32-P4's available module clocks are listed in soc_module_clk_t
. Each module clock has a unique ID. You can get more information on each clock by checking the documented enum value.
API Usage
The clock tree driver provides an all-in-one API to get the frequency of the module clocks, esp_clk_tree_src_get_freq_hz()
. This function allows you to obtain the clock frequency at any time by providing the clock name soc_module_clk_t
and specifying the desired precision level for the returned frequency value esp_clk_tree_src_freq_precision_t
.
API Reference
Header File
This header file can be included with:
#include "soc/clk_tree_defs.h"
Macros
-
SOC_CLK_RC_FAST_FREQ_APPROX
Approximate RC_FAST_CLK frequency in Hz
-
SOC_CLK_RC_SLOW_FREQ_APPROX
Approximate RC_SLOW_CLK frequency in Hz
-
SOC_CLK_RC32K_FREQ_APPROX
Approximate RC32K_CLK frequency in Hz
-
SOC_CLK_XTAL32K_FREQ_APPROX
Approximate XTAL32K_CLK frequency in Hz
-
SOC_GPTIMER_CLKS
Array initializer for all supported clock sources of GPTimer.
The following code can be used to iterate all possible clocks:
soc_periph_gptimer_clk_src_t gptimer_clks[] = (soc_periph_gptimer_clk_src_t)SOC_GPTIMER_CLKS; for (size_t i = 0; i< sizeof(gptimer_clks) / sizeof(gptimer_clks[0]); i++) { soc_periph_gptimer_clk_src_t clk = gptimer_clks[i]; // Test GPTimer with the clock `clk` }
-
SOC_RMT_CLKS
Array initializer for all supported clock sources of RMT.
-
SOC_UART_CLKS
Array initializer for all supported clock sources of UART.
-
SOC_LP_UART_CLKS
Array initializer for all supported clock sources of LP_UART.
-
SOC_MCPWM_TIMER_CLKS
Array initializer for all supported clock sources of MCPWM Timer.
-
SOC_MCPWM_CAPTURE_CLKS
Array initializer for all supported clock sources of MCPWM Capture Timer.
-
SOC_MCPWM_CARRIER_CLKS
Array initializer for all supported clock sources of MCPWM Carrier.
-
SOC_I2S_CLKS
Array initializer for all supported clock sources of I2S.
-
SOC_LP_I2S_CLKS
Array initializer for all supported clock sources of LP I2S.
-
SOC_LCD_CLKS
Array initializer for all supported clock sources of LCD.
-
SOC_CAM_CLKS
Array initializer for all supported clock sources of CAM.
-
SOC_MIPI_CSI_PHY_CLKS
Array initializer for all supported clock sources of MIPI CSI PHY interface.
-
SOC_MIPI_DSI_DPI_CLKS
Array initializer for all supported clock sources of MIPI DSI DPI interface.
-
SOC_MIPI_DSI_PHY_CLKS
Array initializer for all supported clock sources of MIPI DSI PHY interface.
-
SOC_I2C_CLKS
Array initializer for all supported clock sources of I2C.
-
SOC_LP_I2C_CLKS
Array initializer for all supported clock sources of LP_I2C.
-
SOC_SPI_CLKS
Array initializer for all supported clock sources of SPI.
-
SOC_PSRAM_CLKS
Array initializer for all supported clock sources of PSRAM.
-
SOC_FLASH_CLKS
Array initializer for all supported clock sources of FLASH.
-
SOC_ISP_CLKS
Array initializer for all supported clock sources of ISP.
-
SOC_SDM_CLKS
Array initializer for all supported clock sources of SDM.
-
SOC_GLITCH_FILTER_CLKS
Array initializer for all supported clock sources of Glitch Filter.
-
SOC_ANA_CMPR_CLKS
Array initializer for all supported clock sources of Analog Comparator.
-
SOC_TWAI_CLKS
Array initializer for all supported clock sources of TWAI.
-
SOC_ADC_DIGI_CLKS
Array initializer for all supported clock sources of ADC digital controller.
-
SOC_ADC_RTC_CLKS
Array initializer for all supported clock sources of ADC RTC controller.
-
SOC_LP_ADC_CLKS
Array initializer for all supported clock sources of LP_ADC.
-
SOC_MWDT_CLKS
Array initializer for all supported clock sources of MWDT.
-
SOC_LEDC_CLKS
Array initializer for all supported clock sources of LEDC.
-
SOC_PARLIO_CLKS
Array initializer for all supported clock sources of PARLIO.
-
SOC_SDMMC_CLKS
Array initializer for all supported clock sources of SDMMC.
-
SOC_TEMP_SENSOR_CLKS
Array initializer for all supported clock sources of Temperature Sensor.
Enumerations
-
enum soc_root_clk_t
Root clock.
Values:
-
enumerator SOC_ROOT_CLK_INT_RC_FAST
Internal 17.5MHz RC oscillator
-
enumerator SOC_ROOT_CLK_INT_RC_SLOW
Internal 136kHz RC oscillator
-
enumerator SOC_ROOT_CLK_EXT_XTAL
External 40MHz crystal
-
enumerator SOC_ROOT_CLK_EXT_XTAL32K
External 32kHz crystal
-
enumerator SOC_ROOT_CLK_INT_RC32K
Internal 32kHz RC oscillator
-
enumerator SOC_ROOT_CLK_EXT_OSC_SLOW
External slow clock signal at pin1
-
enumerator SOC_ROOT_CLK_INT_RC_FAST
-
enum soc_cpu_clk_src_t
CPU_CLK mux inputs, which are the supported clock sources for the CPU_CLK.
Note
Enum values are matched with the register field values on purpose
Values:
-
enumerator SOC_CPU_CLK_SRC_XTAL
Select XTAL_CLK as CPU_CLK source
-
enumerator SOC_CPU_CLK_SRC_CPLL
Select CPLL_CLK as CPU_CLK source (CPLL_CLK is the output of 40MHz crystal oscillator frequency multiplier, can be 320/360/400MHz)
-
enumerator SOC_CPU_CLK_SRC_PLL
Alias name for
SOC_CPU_CLK_SRC_CPLL
-
enumerator SOC_CPU_CLK_SRC_RC_FAST
Select RC_FAST_CLK as CPU_CLK source
-
enumerator SOC_CPU_CLK_SRC_INVALID
Invalid CPU_CLK source
-
enumerator SOC_CPU_CLK_SRC_XTAL
-
enum soc_rtc_slow_clk_src_t
RTC_SLOW_CLK mux inputs, which are the supported clock sources for the RTC_SLOW_CLK.
Note
Enum values are matched with the register field values on purpose
Values:
-
enumerator SOC_RTC_SLOW_CLK_SRC_RC_SLOW
Select RC_SLOW_CLK as RTC_SLOW_CLK source
-
enumerator SOC_RTC_SLOW_CLK_SRC_XTAL32K
Select XTAL32K_CLK as RTC_SLOW_CLK source
-
enumerator SOC_RTC_SLOW_CLK_SRC_RC32K
Select RC32K_CLK as RTC_SLOW_CLK source
-
enumerator SOC_RTC_SLOW_CLK_SRC_INVALID
Invalid RTC_SLOW_CLK source
-
enumerator SOC_RTC_SLOW_CLK_SRC_RC_SLOW
-
enum soc_rtc_fast_clk_src_t
RTC_FAST_CLK mux inputs, which are the supported clock sources for the RTC_FAST_CLK.
Note
Enum values are matched with the register field values on purpose
Values:
-
enumerator SOC_RTC_FAST_CLK_SRC_RC_FAST
Select RC_FAST_CLK as RTC_FAST_CLK source
-
enumerator SOC_RTC_FAST_CLK_SRC_XTAL
Select XTAL_CLK as RTC_FAST_CLK source
-
enumerator SOC_RTC_FAST_CLK_SRC_XTAL_DIV
Alias name for
SOC_RTC_FAST_CLK_SRC_XTAL
-
enumerator SOC_RTC_FAST_CLK_SRC_LP_PLL
Select LP_PLL_CLK as RTC_FAST_CLK source (LP_PLL_CLK is a 8MHz clock sourced from RC32K or XTAL32K)
-
enumerator SOC_RTC_FAST_CLK_SRC_INVALID
Invalid RTC_FAST_CLK source
-
enumerator SOC_RTC_FAST_CLK_SRC_RC_FAST
-
enum soc_lp_pll_clk_src_t
LP_PLL_CLK mux inputs, which are the supported clock sources for the LP_PLL_CLK.
Note
Enum values are matched with the register field values on purpose
Values:
-
enumerator SOC_LP_PLL_CLK_SRC_RC32K
Select RC32K_CLK as LP_PLL_CLK source
-
enumerator SOC_LP_PLL_CLK_SRC_XTAL32K
Select XTAL32K_CLK as LP_PLL_CLK source
-
enumerator SOC_LP_PLL_CLK_SRC_INVALID
Invalid LP_PLL_CLK source
-
enumerator SOC_LP_PLL_CLK_SRC_RC32K
-
enum soc_xtal_freq_t
Possible main XTAL frequency options on the target.
Note
Enum values equal to the frequency value in MHz
Note
Not all frequency values listed here are supported in IDF. Please check SOC_XTAL_SUPPORT_XXX in soc_caps.h for the supported ones.
Values:
-
enumerator SOC_XTAL_FREQ_40M
40MHz XTAL
-
enumerator SOC_XTAL_FREQ_40M
-
enum soc_module_clk_t
Supported clock sources for modules (CPU, peripherals, RTC, etc.)
Note
enum starts from 1, to save 0 for special purpose
Values:
-
enumerator SOC_MOD_CLK_CPU
CPU_CLK can be sourced from XTAL, CPLL, or RC_FAST by configuring soc_cpu_clk_src_t
-
enumerator SOC_MOD_CLK_RTC_FAST
RTC_FAST_CLK can be sourced from XTAL, RC_FAST, or LP_PLL by configuring soc_rtc_fast_clk_src_t
-
enumerator SOC_MOD_CLK_RTC_SLOW
RTC_SLOW_CLK can be sourced from RC_SLOW, XTAL32K, or RC32K by configuring soc_rtc_slow_clk_src_t
-
enumerator SOC_MOD_CLK_PLL_F20M
PLL_F20M_CLK is derived from SPLL (clock gating + "fixed" divider of 24), it has a fixed frequency of 20MHz
-
enumerator SOC_MOD_CLK_PLL_F25M
PLL_F25M_CLK is derived from MPLL (clock gating + configurable divider), it will have a frequency of 25MHz
-
enumerator SOC_MOD_CLK_PLL_F80M
PLL_F80M_CLK is derived from SPLL (clock gating + "fixed" divider of 6), it has a fixed frequency of 80MHz
-
enumerator SOC_MOD_CLK_PLL_F160M
PLL_F160M_CLK is derived from SPLL (clock gating + "fixed" divider of 3), it has a fixed frequency of 160MHz
-
enumerator SOC_MOD_CLK_PLL_F240M
PLL_F240M_CLK is derived from SPLL (clock gating + "fixed" divider of 2), it has a fixed frequency of 240MHz
-
enumerator SOC_MOD_CLK_CPLL
CPLL is from 40MHz XTAL oscillator frequency multipliers
-
enumerator SOC_MOD_CLK_SPLL
SPLL is from 40MHz XTAL oscillator frequency multipliers, it has a "fixed" frequency of 480MHz
-
enumerator SOC_MOD_CLK_MPLL
MPLL is from 40MHz XTAL oscillator frequency multipliers
-
enumerator SOC_MOD_CLK_XTAL32K
XTAL32K_CLK comes from the external 32kHz crystal, passing a clock gating to the peripherals
-
enumerator SOC_MOD_CLK_RC_FAST
RC_FAST_CLK comes from the internal 20MHz rc oscillator, passing a clock gating to the peripherals
-
enumerator SOC_MOD_CLK_XTAL
XTAL_CLK comes from the external 40MHz crystal
-
enumerator SOC_MOD_CLK_APLL
Audio PLL is sourced from PLL, and its frequency is configurable through APLL configuration registers
-
enumerator SOC_MOD_CLK_XTAL_D2
XTAL_D2_CLK comes from the external 40MHz crystal, passing a div of 2 to the LP peripherals
-
enumerator SOC_MOD_CLK_LP_PLL
LP_PLL is from 32kHz XTAL oscillator frequency multipliers, it has a fixed frequency of 8MHz
-
enumerator SOC_MOD_CLK_LP_DYN_FAST
LP_DYN_FAST can be derived from RTC_SLOW_CLK or RTC_FAST_CLK depending on the chip’s power mode: in active mode, select RTC_FAST_CLK as the clock source; in light/deep sleep mode, select RTC_SLOW_CLK as the clock source
-
enumerator SOC_MOD_CLK_LP_PERI
LP_PERI_CLK is derived from LP_DYN_FAST (configurable divider)
-
enumerator SOC_MOD_CLK_INVALID
Indication of the end of the available module clock sources
-
enumerator SOC_MOD_CLK_CPU
-
enum soc_periph_systimer_clk_src_t
Type of SYSTIMER clock source.
Values:
-
enumerator SYSTIMER_CLK_SRC_XTAL
SYSTIMER source clock is XTAL
-
enumerator SYSTIMER_CLK_SRC_RC_FAST
SYSTIMER source clock is RC_FAST
-
enumerator SYSTIMER_CLK_SRC_DEFAULT
SYSTIMER source clock default choice is XTAL
-
enumerator SYSTIMER_CLK_SRC_XTAL
-
enum soc_periph_gptimer_clk_src_t
Type of GPTimer clock source.
Values:
-
enumerator GPTIMER_CLK_SRC_PLL_F80M
Select PLL_F80M as the source clock
-
enumerator GPTIMER_CLK_SRC_RC_FAST
Select RC_FAST as the source clock
-
enumerator GPTIMER_CLK_SRC_XTAL
Select XTAL as the source clock
-
enumerator GPTIMER_CLK_SRC_DEFAULT
Select PLL_F80M as the default choice
-
enumerator GPTIMER_CLK_SRC_PLL_F80M
-
enum soc_periph_tg_clk_src_legacy_t
Type of Timer Group clock source, reserved for the legacy timer group driver.
Values:
-
enumerator TIMER_SRC_CLK_PLL_F80M
Timer group clock source is PLL_F80M
-
enumerator TIMER_SRC_CLK_XTAL
Timer group clock source is XTAL
-
enumerator TIMER_SRC_CLK_DEFAULT
Timer group clock source default choice is PLL_F80M
-
enumerator TIMER_SRC_CLK_PLL_F80M
-
enum soc_periph_rmt_clk_src_t
Type of RMT clock source.
Values:
-
enumerator RMT_CLK_SRC_PLL_F80M
Select PLL_F80M as the source clock
-
enumerator RMT_CLK_SRC_RC_FAST
Select RC_FAST as the source clock
-
enumerator RMT_CLK_SRC_XTAL
Select XTAL as the source clock
-
enumerator RMT_CLK_SRC_DEFAULT
Select PLL_F80M as the default choice
-
enumerator RMT_CLK_SRC_PLL_F80M
-
enum soc_periph_rmt_clk_src_legacy_t
Type of RMT clock source, reserved for the legacy RMT driver.
Values:
-
enumerator RMT_BASECLK_PLL_F80M
RMT source clock is PLL_F80M
-
enumerator RMT_BASECLK_XTAL
RMT source clock is XTAL
-
enumerator RMT_BASECLK_DEFAULT
RMT source clock default choice is PLL_F80M
-
enumerator RMT_BASECLK_PLL_F80M
-
enum soc_periph_uart_clk_src_legacy_t
Type of UART clock source, reserved for the legacy UART driver.
Values:
-
enumerator UART_SCLK_PLL_F80M
UART source clock is PLL_F80M
-
enumerator UART_SCLK_RTC
UART source clock is RC_FAST
-
enumerator UART_SCLK_XTAL
UART source clock is XTAL
-
enumerator UART_SCLK_DEFAULT
UART source clock default choice is PLL_F80M
-
enumerator UART_SCLK_PLL_F80M
-
enum soc_periph_lp_uart_clk_src_t
Type of LP_UART clock source.
Values:
-
enumerator LP_UART_SCLK_LP_FAST
LP_UART source clock is LP(RTC)_FAST
-
enumerator LP_UART_SCLK_XTAL_D2
LP_UART source clock is XTAL_D2
-
enumerator LP_UART_SCLK_DEFAULT
LP_UART source clock default choice is LP(RTC)_FAST
-
enumerator LP_UART_SCLK_LP_FAST
-
enum soc_periph_mcpwm_timer_clk_src_t
Type of MCPWM timer clock source.
Values:
-
enumerator MCPWM_TIMER_CLK_SRC_PLL160M
Select PLL_F160M as the source clock
-
enumerator MCPWM_TIMER_CLK_SRC_XTAL
Select XTAL as the source clock
-
enumerator MCPWM_TIMER_CLK_SRC_DEFAULT
Select PLL_F160M as the default choice
-
enumerator MCPWM_TIMER_CLK_SRC_PLL160M
-
enum soc_periph_mcpwm_capture_clk_src_t
Type of MCPWM capture clock source.
Values:
-
enumerator MCPWM_CAPTURE_CLK_SRC_PLL160M
Select PLL_F160M as the source clock
-
enumerator MCPWM_CAPTURE_CLK_SRC_XTAL
Select XTAL as the source clock
-
enumerator MCPWM_CAPTURE_CLK_SRC_DEFAULT
Select PLL_F160M as the default choice
-
enumerator MCPWM_CAPTURE_CLK_SRC_PLL160M
-
enum soc_periph_mcpwm_carrier_clk_src_t
Type of MCPWM carrier clock source.
Values:
-
enumerator MCPWM_CARRIER_CLK_SRC_PLL160M
Select PLL_F160M as the source clock
-
enumerator MCPWM_CARRIER_CLK_SRC_XTAL
Select XTAL as the source clock
-
enumerator MCPWM_CARRIER_CLK_SRC_DEFAULT
Select PLL_F160M as the default choice
-
enumerator MCPWM_CARRIER_CLK_SRC_PLL160M
-
enum soc_periph_i2s_clk_src_t
I2S clock source enum.
Values:
-
enumerator I2S_CLK_SRC_DEFAULT
Select XTAL as the default source clock
-
enumerator I2S_CLK_SRC_XTAL
Select XTAL as the source clock
-
enumerator I2S_CLK_SRC_APLL
Select APLL as the source clock
-
enumerator I2S_CLK_SRC_EXTERNAL
Select external clock as source clock
-
enumerator I2S_CLK_SRC_DEFAULT
-
enum soc_periph_lp_i2s_clk_src_t
LP I2S clock source enum.
Values:
-
enumerator LP_I2S_CLK_SRC_DEFAULT
Select LP_PERI as the default source clock
-
enumerator LP_I2S_CLK_SRC_LP_PERI
Select LP_PERI as the source clock
-
enumerator LP_I2S_CLK_SRC_XTAL_D2
LP_I2S source clock is XTAL_D2
-
enumerator LP_I2S_CLK_SRC_DEFAULT
-
enum soc_periph_lcd_clk_src_t
Type of LCD clock source.
Values:
-
enumerator LCD_CLK_SRC_PLL160M
Select PLL_F160M as the source clock
-
enumerator LCD_CLK_SRC_XTAL
Select XTAL as the source clock
-
enumerator LCD_CLK_SRC_APLL
Select APLL as the source clock
-
enumerator LCD_CLK_SRC_DEFAULT
Select PLL_F160M as the default choice
-
enumerator LCD_CLK_SRC_PLL160M
-
enum soc_periph_cam_clk_src_t
Type of CAM clock source.
Values:
-
enumerator CAM_CLK_SRC_PLL160M
Select PLL_F160M as the source clock
-
enumerator CAM_CLK_SRC_XTAL
Select XTAL as the source clock
-
enumerator CAM_CLK_SRC_APLL
Select APLL as the source clock
-
enumerator CAM_CLK_SRC_DEFAULT
Select PLL_F160M as the default choice
-
enumerator CAM_CLK_SRC_PLL160M
-
enum soc_periph_mipi_csi_phy_clk_src_t
Type of MIPI CSI PHY clock source.
Values:
-
enumerator MIPI_CSI_PHY_CLK_SRC_RC_FAST
Select RC_FAST as MIPI CSI PHY source clock
-
enumerator MIPI_CSI_PHY_CLK_SRC_PLL_F25M
Select PLL_F25M as MIPI CSI PHY source clock
-
enumerator MIPI_CSI_PHY_CLK_SRC_PLL_F20M
Select PLL_F20M as MIPI CSI PHY source clock
-
enumerator MIPI_CSI_PHY_CLK_SRC_DEFAULT
Select PLL_F20M as default clock
-
enumerator MIPI_CSI_PHY_CLK_SRC_RC_FAST
-
enum soc_periph_mipi_dsi_dpi_clk_src_t
Type of MIPI DSI DPI clock source.
Values:
-
enumerator MIPI_DSI_DPI_CLK_SRC_XTAL
Select XTAL as MIPI DSI DPI source clock
-
enumerator MIPI_DSI_DPI_CLK_SRC_PLL_F160M
Select PLL_F160M as MIPI DSI DPI source clock
-
enumerator MIPI_DSI_DPI_CLK_SRC_PLL_F240M
Select PLL_F240M as MIPI DSI DPI source clock
-
enumerator MIPI_DSI_DPI_CLK_SRC_DEFAULT
Select PLL_F240M as default clock
-
enumerator MIPI_DSI_DPI_CLK_SRC_XTAL
-
enum soc_periph_mipi_dsi_phy_clk_src_t
Type of MIPI DSI PHY clock source.
Values:
-
enumerator MIPI_DSI_PHY_CLK_SRC_RC_FAST
Select RC_FAST as MIPI DSI PHY source clock
-
enumerator MIPI_DSI_PHY_CLK_SRC_PLL_F25M
Select PLL_F25M as MIPI DSI PHY source clock
-
enumerator MIPI_DSI_PHY_CLK_SRC_PLL_F20M
Select PLL_F20M as MIPI DSI PHY source clock
-
enumerator MIPI_DSI_PHY_CLK_SRC_DEFAULT
Select PLL_F20M as default clock
-
enumerator MIPI_DSI_PHY_CLK_SRC_RC_FAST
-
enum soc_periph_i2c_clk_src_t
Type of I2C clock source.
Values:
-
enumerator I2C_CLK_SRC_XTAL
Select XTAL as the source clock
-
enumerator I2C_CLK_SRC_RC_FAST
Select RC_FAST as the source clock
-
enumerator I2C_CLK_SRC_DEFAULT
Select XTAL as the default source clock
-
enumerator I2C_CLK_SRC_XTAL
-
enum soc_periph_lp_i2c_clk_src_t
Type of LP_I2C clock source.
Values:
-
enumerator LP_I2C_SCLK_LP_FAST
LP_I2C source clock is RTC_FAST
-
enumerator LP_I2C_SCLK_XTAL_D2
LP_I2C source clock is XTAL_D2
-
enumerator LP_I2C_SCLK_DEFAULT
LP_I2C source clock default choice is RTC_FAST
-
enumerator LP_I2C_SCLK_LP_FAST
-
enum soc_periph_spi_clk_src_t
Type of SPI clock source.
Values:
-
enumerator SPI_CLK_SRC_XTAL
Select XTAL as SPI source clock
-
enumerator SPI_CLK_SRC_RC_FAST
Select RC_FAST_20M as SPI source clock
-
enumerator SPI_CLK_SRC_SPLL
Select SPLL as SPI source clock
-
enumerator SPI_CLK_SRC_DEFAULT
Select XTAL as default source clock
-
enumerator SPI_CLK_SRC_XTAL
-
enum soc_periph_psram_clk_src_t
Type of PSRAM clock source.
Values:
-
enumerator PSRAM_CLK_SRC_DEFAULT
Select SOC_MOD_CLK_SPLL as PSRAM source clock
-
enumerator PSRAM_CLK_SRC_XTAL
Select SOC_MOD_CLK_XTAL as PSRAM source clock
-
enumerator PSRAM_CLK_SRC_CPLL
Select SOC_MOD_CLK_CPLL as PSRAM source clock
-
enumerator PSRAM_CLK_SRC_SPLL
Select SOC_MOD_CLK_SPLL as PSRAM source clock
-
enumerator PSRAM_CLK_SRC_MPLL
Select SOC_MOD_CLK_MPLL as PSRAM source clock
-
enumerator PSRAM_CLK_SRC_DEFAULT
-
enum soc_periph_flash_clk_src_t
Type of FLASH clock source.
Values:
-
enumerator FLASH_CLK_SRC_DEFAULT
Select SOC_MOD_CLK_SPLL as FLASH source clock
-
enumerator FLASH_CLK_SRC_XTAL
Select SOC_MOD_CLK_XTAL as FLASH source clock
-
enumerator FLASH_CLK_SRC_CPLL
Select SOC_MOD_CLK_CPLL as FLASH source clock
-
enumerator FLASH_CLK_SRC_SPLL
Select SOC_MOD_CLK_SPLL as FLASH source clock
-
enumerator FLASH_CLK_SRC_DEFAULT
-
enum soc_periph_isp_clk_src_t
Type of ISP clock source.
Values:
-
enumerator ISP_CLK_SRC_DEFAULT
Select SOC_MOD_CLK_PLL_F160M as ISP source clock
-
enumerator ISP_CLK_SRC_XTAL
Select SOC_MOD_CLK_XTAL as ISP source clock
-
enumerator ISP_CLK_SRC_PLL160
Select SOC_MOD_CLK_PLL_F160M as ISP source clock
-
enumerator ISP_CLK_SRC_PLL240
Select SOC_MOD_CLK_PLL_F240M as ISP source clock
-
enumerator ISP_CLK_SRC_DEFAULT
-
enum soc_periph_sdm_clk_src_t
Sigma Delta Modulator clock source.
Values:
-
enumerator SDM_CLK_SRC_XTAL
Select XTAL clock as the source clock
-
enumerator SDM_CLK_SRC_PLL_F80M
Select PLL_F80M clock as the source clock
-
enumerator SDM_CLK_SRC_DEFAULT
Select PLL_F80M clock as the default clock choice
-
enumerator SDM_CLK_SRC_XTAL
-
enum soc_periph_glitch_filter_clk_src_t
Glitch filter clock source.
Values:
-
enumerator GLITCH_FILTER_CLK_SRC_XTAL
Select XTAL clock as the source clock
-
enumerator GLITCH_FILTER_CLK_SRC_PLL_F80M
Select PLL_F80M clock as the source clock
-
enumerator GLITCH_FILTER_CLK_SRC_DEFAULT
Select PLL_F80M clock as the default clock choice
-
enumerator GLITCH_FILTER_CLK_SRC_XTAL
-
enum soc_periph_ana_cmpr_clk_src_t
Analog Comparator clock source.
Values:
-
enumerator ANA_CMPR_CLK_SRC_XTAL
Select XTAL clock as the source clock
-
enumerator ANA_CMPR_CLK_SRC_PLL_F80M
Select PLL_F80M clock as the source clock
-
enumerator ANA_CMPR_CLK_SRC_DEFAULT
Select PLL_F80M as the default clock choice
-
enumerator ANA_CMPR_CLK_SRC_XTAL
-
enum soc_periph_twai_clk_src_t
TWAI clock source.
Values:
-
enumerator TWAI_CLK_SRC_XTAL
Select XTAL as the source clock
-
enumerator TWAI_CLK_SRC_RC_FAST
Select RC_FAST as the source clock
-
enumerator TWAI_CLK_SRC_DEFAULT
Select XTAL as the default clock choice
-
enumerator TWAI_CLK_SRC_XTAL
-
enum soc_periph_adc_digi_clk_src_t
ADC digital controller clock source.
Values:
-
enumerator ADC_DIGI_CLK_SRC_XTAL
Select XTAL as the source clock
-
enumerator ADC_DIGI_CLK_SRC_RC_FAST
Select RC_FAST as the source clock
-
enumerator ADC_DIGI_CLK_SRC_PLL_F80M
Select PLL_F80M as the source clock
-
enumerator ADC_DIGI_CLK_SRC_DEFAULT
Select PLL_F80M as the default clock choice
-
enumerator ADC_DIGI_CLK_SRC_XTAL
-
enum soc_periph_adc_rtc_clk_src_t
ADC RTC controller clock source.
Values:
-
enumerator ADC_RTC_CLK_SRC_RC_FAST
Select RC_FAST as the source clock
-
enumerator ADC_RTC_CLK_SRC_DEFAULT
Select RC_FAST as the default clock choice
-
enumerator ADC_RTC_CLK_SRC_RC_FAST
-
enum soc_periph_lp_adc_clk_src_t
LP ADC controller clock source.
Values:
-
enumerator LP_ADC_CLK_SRC_LP_DYN_FAST
Select LP_DYN_FAST as the source clock
-
enumerator LP_ADC_CLK_SRC_LP_DYN_FAST
-
enum soc_periph_mwdt_clk_src_t
MWDT clock source.
Values:
-
enumerator MWDT_CLK_SRC_XTAL
Select XTAL as the source clock
-
enumerator MWDT_CLK_SRC_PLL_F80M
Select PLL fixed 80 MHz as the source clock
-
enumerator MWDT_CLK_SRC_RC_FAST
Select RTC fast as the source clock
-
enumerator MWDT_CLK_SRC_DEFAULT
Select XTAL 40 MHz as the default clock choice
-
enumerator MWDT_CLK_SRC_XTAL
-
enum soc_periph_ledc_clk_src_legacy_t
Type of LEDC clock source, reserved for the legacy LEDC driver.
Values:
-
enumerator LEDC_AUTO_CLK
LEDC source clock will be automatically selected based on the giving resolution and duty parameter when init the timer
-
enumerator LEDC_USE_XTAL_CLK
Select XTAL as the source clock
-
enumerator LEDC_USE_PLL_DIV_CLK
Select PLL_F80M clock as the source clock
-
enumerator LEDC_USE_RC_FAST_CLK
Select RC_FAST as the source clock
-
enumerator LEDC_AUTO_CLK
-
enum soc_periph_parlio_clk_src_t
PARLIO clock source.
Values:
-
enumerator PARLIO_CLK_SRC_XTAL
Select XTAL as the source clock
-
enumerator PARLIO_CLK_SRC_RC_FAST
Select RC_FAST as the source clock
-
enumerator PARLIO_CLK_SRC_PLL_F160M
Select PLL_F160M as the source clock
-
enumerator PARLIO_CLK_SRC_EXTERNAL
Select EXTERNAL clock as the source clock
-
enumerator PARLIO_CLK_SRC_DEFAULT
Select PLL_F160M as the default clock choice
-
enumerator PARLIO_CLK_SRC_XTAL
-
enum soc_periph_sdmmc_clk_src_t
Type of SDMMC clock source.
Values:
-
enumerator SDMMC_CLK_SRC_DEFAULT
Select PLL_160M as the default choice
-
enumerator SDMMC_CLK_SRC_PLL160M
Select PLL_160M as the source clock
-
enumerator SDMMC_CLK_SRC_DEFAULT
-
enum soc_periph_temperature_sensor_clk_src_t
Type of Temp Sensor clock source.
Values:
-
enumerator TEMPERATURE_SENSOR_CLK_SRC_LP_PERI
Select LP_PERI as the source clock
-
enumerator TEMPERATURE_SENSOR_CLK_SRC_DEFAULT
Select LP_PERI as the default choice
-
enumerator TEMPERATURE_SENSOR_CLK_SRC_LP_PERI
-
enum soc_clkout_sig_id_t
Values:
-
enumerator CLKOUT_SIG_MPLL
MPLL is from 40MHz XTAL oscillator frequency multipliers
-
enumerator CLKOUT_SIG_SPLL
SPLL is from 40MHz XTAL oscillator frequency multipliers, it has a "fixed" frequency of 480MHz
-
enumerator CLKOUT_SIG_CPLL
CPLL_CLK is the output of 40MHz crystal oscillator frequency multiplier, can be 320/360/400MHz
-
enumerator CLKOUT_SIG_XTAL
External 40MHz crystal
-
enumerator CLKOUT_SIG_RC_FAST
Internal 17.5MHz RC oscillator
-
enumerator CLKOUT_SIG_RC_SLOW
Internal 136kHz RC oscillator
-
enumerator CLKOUT_SIG_RC_32K
Internal 32kHz RC oscillator
-
enumerator CLKOUT_SIG_XTAL32K
External 32kHz crystal clock
-
enumerator CLKOUT_SIG_I2S0
I2S0 clock, depends on the i2s driver configuration
-
enumerator CLKOUT_SIG_I2S1
I2S1 clock, depends on the i2s driver configuration
-
enumerator CLKOUT_SIG_I2S2
I2S2 clock, depends on the i2s driver configuration
-
enumerator CLKOUT_SIG_CPU
CPU clock
-
enumerator CLKOUT_SIG_MEM
MEM clock
-
enumerator CLKOUT_SIG_SYS
SYS clock
-
enumerator CLKOUT_SIG_APB
APB clock
-
enumerator CLKOUT_SIG_PLL_F80M
From PLL, usually be 80MHz
-
enumerator CLKOUT_SIG_INVALID
-
enumerator CLKOUT_SIG_MPLL
Header File
This header file can be included with:
#include "esp_clk_tree.h"
Functions
-
esp_err_t esp_clk_tree_src_get_freq_hz(soc_module_clk_t clk_src, esp_clk_tree_src_freq_precision_t precision, uint32_t *freq_value)
Get frequency of module clock source.
- Parameters
clk_src -- [in] Clock source available to modules, in soc_module_clk_t
precision -- [in] Degree of precision, one of esp_clk_tree_src_freq_precision_t values This arg only applies to the clock sources that their frequencies can vary: SOC_MOD_CLK_RTC_FAST, SOC_MOD_CLK_RTC_SLOW, SOC_MOD_CLK_RC_FAST, SOC_MOD_CLK_RC_FAST_D256, SOC_MOD_CLK_XTAL32K For other clock sources, this field is ignored.
freq_value -- [out] Frequency of the clock source, in Hz
- Returns
ESP_OK Success
ESP_ERR_INVALID_ARG Parameter error
ESP_FAIL Calibration failed
Enumerations
-
enum esp_clk_tree_src_freq_precision_t
Degree of precision of frequency value to be returned by esp_clk_tree_src_get_freq_hz()
Values:
-
enumerator ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED
-
enumerator ESP_CLK_TREE_SRC_FREQ_PRECISION_APPROX
-
enumerator ESP_CLK_TREE_SRC_FREQ_PRECISION_EXACT
-
enumerator ESP_CLK_TREE_SRC_FREQ_PRECISION_INVALID
-
enumerator ESP_CLK_TREE_SRC_FREQ_PRECISION_CACHED