Module parl_io

Available on crate feature unstable only.

Parallel IO (PARL_IO)

Overview

The Parallel IO peripheral is a general purpose parallel interface that can be used to connect to external devices such as LED matrix, LCD display, Printer and Camera. The peripheral has independent TX and RX units. Each unit can have up to 8 or 16 data signals (depending on your target hardware) plus 1 or 2 clock signals.

Configuration

The driver uses DMA (Direct Memory Access) for efficient data transfer.

Examples

Initialization for RX

// Initialize DMA buffer and descriptors for data reception
let (rx_buffer, rx_descriptors, _, _) = dma_buffers!(32000, 0);
let mut dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer)?;
let dma_channel = peripherals.DMA_CH0;

// Configure the 4-bit input pins and clock pin
let mut rx_pins = RxFourBits::new(
    peripherals.GPIO1,
    peripherals.GPIO2,
    peripherals.GPIO3,
    peripherals.GPIO4,
);
let mut rx_clk_pin = NoPin;

// Set up Parallel IO for 1MHz data input, with DMA and bit packing
//  configuration
 let parl_io = ParlIoRxOnly::new(
    peripherals.PARL_IO,
    dma_channel,
    Rate::from_mhz(1),
)?;

let mut parl_io_rx = parl_io
    .rx
    .with_config(
        &mut rx_pins,
        &mut rx_clk_pin,
        BitPackOrder::Msb,
        Some(0xfff),
    )?;

// Initialize the buffer and delay
dma_rx_buf.as_mut_slice().fill(0u8);
let delay = Delay::new();

loop {
    // Read data via DMA and print received values
    let transfer = parl_io_rx.read(Some(dma_rx_buf.len()), dma_rx_buf)?;
    (_, parl_io_rx, dma_rx_buf) = transfer.wait();

    delay.delay_millis(500);
}

Initialization for TX

// Initialize DMA buffer and descriptors for data reception
let mut dma_tx_buf = dma_tx_buffer!(32000).unwrap();
let dma_channel = peripherals.DMA_CH0;

// Configure the 4-bit input pins and clock pin
let tx_pins = TxFourBits::new(
    peripherals.GPIO1,
    peripherals.GPIO2,
    peripherals.GPIO3,
    peripherals.GPIO4,
);

let mut pin_conf = TxPinConfigWithValidPin::new(tx_pins, peripherals.GPIO5);

// Set up Parallel IO for 1MHz data input, with DMA and bit packing
//  configuration
 let parl_io = ParlIoTxOnly::new(
    peripherals.PARL_IO,
    dma_channel,
    Rate::from_mhz(1),
)?;

let mut clock_pin = ClkOutPin::new(peripherals.GPIO6);
let mut parl_io_tx = parl_io
    .tx
    .with_config(
        &mut pin_conf,
        &mut clock_pin,
        0,
        SampleEdge::Normal,
        BitPackOrder::Msb,
    )?;

for i in 0..dma_tx_buf.len() {
     dma_tx_buf.as_mut_slice()[i] = (i % 255) as u8;
}

let delay = Delay::new();
loop {
    let transfer = parl_io_tx.write(dma_tx_buf.len(), dma_tx_buf)?;
    (_, parl_io_tx, dma_tx_buf) = transfer.wait();
    delay.delay_millis(500);
}

Structs

ClkInPin

Wraps a GPIO pin which will be used as the TX clock input signal

ClkOutPin

Wraps a GPIO pin which will be used as the clock output signal

ParlIoFullDuplex

Parallel IO in full duplex mode

ParlIoRx

Parallel IO RX channel

ParlIoRxOnly

Parallel IO in half duplex / RX only mode

ParlIoRxTransfer

Represents an ongoing (or potentially finished) transfer using the PARL_IO TX.

ParlIoTx

Parallel IO TX channel

ParlIoTxOnly

Parallel IO in half duplex / TX only mode

ParlIoTxTransfer

Represents an ongoing (or potentially finished) transfer using the PARL_IO TX.

RxClkInPin

Wraps a GPIO pin which will be used as the RX clock input signal

RxCreator

Creates a RX channel

RxCreatorFullDuplex

Creates a RX channel

RxEightBits

Data pin configuration for 8 bit input mode

RxFourBits

Data pin configuration for 4 bit input mode

RxOneBit

Data pin configuration for 1 bit input mode

RxPinConfigIncludingValidPin

Pin configuration where the pin for the valid signal is the MSB pin.

RxPinConfigWithValidPin

Pin configuration with an additional pin for the valid signal.

RxSixteenBits

Data pin configuration for 16 bit input mode

RxTwoBits

Data pin configuration for 2 bit input mode

TxCreator

Creates a TX channel

TxCreatorFullDuplex

Creates a TX channel

TxEightBits

Data pin configuration for 8 bit output mode

TxFourBits

Data pin configuration for 4 bit output mode

TxOneBit

Data pin configuration for 1 bit output mode

TxPinConfigIncludingValidPin

Pin configuration where the pin for the valid signal is the MSB pin.

TxPinConfigWithValidPin

Pin configuration with an additional pin for the valid signal.

TxSixteenBits

Data pin configuration for 16 bit output mode

TxTwoBits

Data pin configuration for 2 bit output mode

Enums

BitPackOrder

Parallel IO bit packing order

EnableMode

Enable Mode

Error

Parallel IO errors

ParlIoInterrupt

Interrupts generated by the peripheral

SampleEdge

Parallel IO sample edge