Module trace

Available on crate feature unstable only.

RISC-­V Trace Encoder (TRACE)

Overview

The high-performance CPU supports instruction trace interface through the trace encoder. The trace encoder connects to HP CPU’s instruction trace interface, compresses the information into smaller packets, and then stores the packets in internal SRAM.

In complex systems, understanding program execution flow is not straightforward. This may be due to a number of factors, for example, interactions with other cores, peripherals, real-time events, poor implementations, or some combination of all of the above.

It is hard to use a debugger to monitor the program execution flow of a running system in real time, as this is intrusive and might affect the running state. But providing visibility of program execution is important.

That is where instruction trace comes in, which provides trace of the program execution.

Examples

let mut buffer = [0_u8; 1024];
let mut trace = Trace::new(peripherals.TRACE0);
trace.start_trace(&mut buffer);
// traced code

// end traced code
let res = trace.stop_trace()?;
// transfer the trace result to the host and decode it there

Structs

Trace

TRACE Encoder Instance

TraceResult

Returned by Trace::stop_trace

Enums

Error

Errors returned from Trace::stop_trace